52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/*
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* Copyright (c) 2022 Synopsys
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/init.h>
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#define ARC_CLN_MST_NOC_0_0_ADDR 292
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#define ARC_CLN_MST_NOC_0_0_SIZE 293
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#define ARC_CLN_MST_NOC_0_1_ADDR 2560
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#define ARC_CLN_MST_NOC_0_1_SIZE 2561
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#define ARC_CLN_MST_NOC_0_2_ADDR 2562
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#define ARC_CLN_MST_NOC_0_2_SIZE 2563
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#define ARC_CLN_MST_NOC_0_3_ADDR 2564
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#define ARC_CLN_MST_NOC_0_3_SIZE 2565
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#define ARC_CLN_MST_NOC_0_4_ADDR 2566
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#define ARC_CLN_MST_NOC_0_4_SIZE 2567
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#define ARC_CLN_PER0_BASE 2688
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#define ARC_CLN_PER0_SIZE 2689
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#define AUX_CLN_ADDR 0x640
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#define AUX_CLN_DATA 0x641
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static int haps_arcv3_init(const struct device *dev)
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{
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ARG_UNUSED(dev);
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z_arc_v2_aux_reg_write(AUX_CLN_ADDR, ARC_CLN_PER0_BASE);
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z_arc_v2_aux_reg_write(AUX_CLN_DATA, 0xF00);
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z_arc_v2_aux_reg_write(AUX_CLN_ADDR, ARC_CLN_PER0_SIZE);
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z_arc_v2_aux_reg_write(AUX_CLN_DATA, 1);
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z_arc_v2_aux_reg_write(AUX_CLN_ADDR, ARC_CLN_MST_NOC_0_0_ADDR);
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z_arc_v2_aux_reg_write(AUX_CLN_DATA, (DT_REG_ADDR(DT_CHOSEN(zephyr_sram)) / (1024 * 1024)));
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z_arc_v2_aux_reg_write(AUX_CLN_ADDR, ARC_CLN_MST_NOC_0_0_SIZE);
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z_arc_v2_aux_reg_write(AUX_CLN_DATA, (DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) / (1024 * 1024)));
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return 0;
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}
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SYS_INIT(haps_arcv3_init, PRE_KERNEL_1, 0);
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