zephyr/boards
Andrew Boie c3b3aafaec x86: generate page tables at runtime
Removes very complex boot-time generation of page tables
with a much simpler runtime generation of them at bootup.

For those x86 boards that enable the MMU in the defconfig,
set the number of page pool pages appropriately.

The MMU_RUNTIME_* flags have been removed. They were an
artifact of the old page table generation and did not
correspond to any hardware state.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-08-07 12:50:53 -07:00
..
arc dts: arc: Remove device_type = "memory" from {d,i}ccm nodes 2019-08-06 08:59:22 -04:00
arm boards: mimzzrt1064_evk: Add pwm-led0 alias 2019-08-07 07:38:40 -05:00
common
nios2 drivers/i2c: Add missing HAS_DTS_I2C to nios 2019-06-18 11:22:23 -04:00
posix nrf52_bsim: Minor fix in time coversion 2019-08-05 18:57:51 +02:00
riscv soc: riscv32: fix zero-riscy zephyr,flash node 2019-08-07 07:27:51 -05:00
shields board/shields: x-nucleo-iks01a3: add STTS751 configuration in overlay 2019-07-31 10:32:10 -04:00
x86 x86: generate page tables at runtime 2019-08-07 12:50:53 -07:00
x86_64/qemu_x86_64 logging: Add qemu_x86_64 backend 2019-07-18 18:16:39 -04:00
xtensa dts/spi-nor: use bytestring for JEDEC ID 2019-07-24 09:20:56 -04:00
CMakeLists.txt
Kconfig
index.rst riscv32: rename to riscv 2019-08-02 13:54:48 -07:00