110 lines
3.0 KiB
Plaintext
110 lines
3.0 KiB
Plaintext
# Kconfig - ARM core configuration options
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#
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# Copyright (c) 2015 Wind River Systems, Inc.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config CPU_CORTEX
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bool
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# Omit prompt to signify "hidden" option
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default n
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help
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This option signifies the use of a CPU of the Cortex family.
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config CPU_CORTEX_M
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bool
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# Omit prompt to signify "hidden" option
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default n
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select CPU_CORTEX
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select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
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select HAS_CMSIS
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select HAS_FLASH_LOAD_OFFSET
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select HAS_DTS
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select ARCH_HAS_STACK_PROTECTION if ARM_CORE_MPU
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select ARCH_HAS_USERSPACE if ARM_CORE_MPU
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help
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This option signifies the use of a CPU of the Cortex-M family.
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config CPU_HAS_SYSTICK
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bool
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# Omit prompt to signify "hidden" option
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default n
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help
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This option is enabled when the CPU has systick timer implemented.
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config BUILTIN_STACK_GUARD
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bool "Thread Stack Guards based on built-in ARM stack limit checking"
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depends on CPU_CORTEX_M_HAS_SPLIM
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select THREAD_STACK_INFO
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default n
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help
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Enable Thread/Interrupt Stack Guards via built-in Stack Pointer
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limit checking. The functionality must be supported by HW.
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config ARM_STACK_PROTECTION
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bool
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default y if HW_STACK_PROTECTION
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select BUILTIN_STACK_GUARD if CPU_CORTEX_M_HAS_SPLIM
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select MPU_STACK_GUARD if (!BUILTIN_STACK_GUARD && ARM_CORE_MPU)
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help
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This option enables either:
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- The built-in Stack Pointer limit checking, or
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- the MPU-based stack guard
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to cause a system fatal error
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if the bounds of the current process stack are overflowed.
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The two stack guard options are mutually exclusive. The
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selection of the built-in Stack Pointer limit checking is
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prioritized over the MPU-based stack guard.
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config ARM_SECURE_FIRMWARE
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bool
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default n
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help
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This option enables Zephyr to include code that executes in
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Secure state, as well as to exclude code that is designed to
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execute only in Non-secure state. The option is only applicable
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to ARMv8-M MCUs that implement the Security Extension.
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Code executing in Secure state has access to both the Secure
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and Non-Secure resources of the Cortex-M MCU.
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Code executing in Non-Secure state may trigger Secure Faults,
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if Secure MCU resources are accessed from the Non-Secure state.
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Secure Faults may only be handled by code executing in Secure
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state.
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menu "Architectue Floating Point Options"
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depends on CPU_HAS_FPU
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choice
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prompt "Floating point ABI"
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default FP_HARDABI
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depends on FLOAT
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config FP_HARDABI
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bool "Floating point Hard ABI"
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depends on FLOAT
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help
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This option selects the Floating point ABI in which hardware floating
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point instructions are generated and uses FPU-specific calling
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conventions
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config FP_SOFTABI
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bool "Floating point Soft ABI"
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depends on FLOAT
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help
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This option selects the Floating point ABI in which hardware floating
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point instructions are generated but soft-float calling conventions.
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endchoice
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endmenu
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source "arch/arm/core/cortex_m/Kconfig"
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if CPU_HAS_MPU
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source "arch/arm/core/cortex_m/mpu/Kconfig"
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endif
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