zephyr/arch/arm/core/Kconfig

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# Kconfig - ARM core configuration options
#
# Copyright (c) 2015 Wind River Systems, Inc.
#
# SPDX-License-Identifier: Apache-2.0
#
config CPU_CORTEX
bool
# Omit prompt to signify "hidden" option
default n
help
This option signifies the use of a CPU of the Cortex family.
config CPU_CORTEX_M
bool
# Omit prompt to signify "hidden" option
default n
select CPU_CORTEX
select ARCH_HAS_CUSTOM_SWAP_TO_MAIN
select HAS_CMSIS
select HAS_FLASH_LOAD_OFFSET
select HAS_DTS
select ARCH_HAS_STACK_PROTECTION if ARM_CORE_MPU
select ARCH_HAS_USERSPACE if ARM_CORE_MPU
help
This option signifies the use of a CPU of the Cortex-M family.
config CPU_HAS_SYSTICK
bool
# Omit prompt to signify "hidden" option
default n
help
This option is enabled when the CPU has systick timer implemented.
config BUILTIN_STACK_GUARD
bool "Thread Stack Guards based on built-in ARM stack limit checking"
depends on CPU_CORTEX_M_HAS_SPLIM
select THREAD_STACK_INFO
default n
help
Enable Thread/Interrupt Stack Guards via built-in Stack Pointer
limit checking. The functionality must be supported by HW.
config ARM_STACK_PROTECTION
bool
default y if HW_STACK_PROTECTION
select BUILTIN_STACK_GUARD if CPU_CORTEX_M_HAS_SPLIM
select MPU_STACK_GUARD if (!BUILTIN_STACK_GUARD && ARM_CORE_MPU)
help
This option enables either:
- The built-in Stack Pointer limit checking, or
- the MPU-based stack guard
to cause a system fatal error
if the bounds of the current process stack are overflowed.
The two stack guard options are mutually exclusive. The
selection of the built-in Stack Pointer limit checking is
prioritized over the MPU-based stack guard.
config ARM_SECURE_FIRMWARE
bool
default n
help
This option enables Zephyr to include code that executes in
Secure state, as well as to exclude code that is designed to
execute only in Non-secure state. The option is only applicable
to ARMv8-M MCUs that implement the Security Extension.
Code executing in Secure state has access to both the Secure
and Non-Secure resources of the Cortex-M MCU.
Code executing in Non-Secure state may trigger Secure Faults,
if Secure MCU resources are accessed from the Non-Secure state.
Secure Faults may only be handled by code executing in Secure
state.
menu "Architectue Floating Point Options"
depends on CPU_HAS_FPU
choice
prompt "Floating point ABI"
default FP_HARDABI
depends on FLOAT
config FP_HARDABI
bool "Floating point Hard ABI"
depends on FLOAT
help
This option selects the Floating point ABI in which hardware floating
point instructions are generated and uses FPU-specific calling
conventions
config FP_SOFTABI
bool "Floating point Soft ABI"
depends on FLOAT
help
This option selects the Floating point ABI in which hardware floating
point instructions are generated but soft-float calling conventions.
endchoice
endmenu
source "arch/arm/core/cortex_m/Kconfig"
if CPU_HAS_MPU
source "arch/arm/core/cortex_m/mpu/Kconfig"
endif