zephyr/boards/st/nucleo_g0b1re/nucleo_g0b1re.dts

/*
 * Copyright (c) 2020 Thomas Stranger
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <st/g0/stm32g0b1Xe.dtsi>
#include <st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	model = "STMicroelectronics STM32G0B1RE-NUCLEO board";
	compatible = "st,stm32g0b1re-nucleo";

	chosen {
		zephyr,console = &usart2;
		zephyr,shell-uart = &usart2;
		zephyr,uart-mcumgr = &usart2;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,canbus = &fdcan1;
	};

	leds: leds {
		compatible = "gpio-leds";
		green_led_1: led_4 {
			gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
			label = "User LD4";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		user_button: button {
			label = "User";
			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
			zephyr,code = <INPUT_KEY_0>;
		};
	};

	aliases {
		led0 = &green_led_1;
		sw0 = &user_button;
		watchdog0 = &iwdg;
		die-temp0 = &die_temp;
		volt-sensor0 = &vref;
		volt-sensor1 = &vbat;
	};
};

&clk_lsi {
	status = "okay";
};

&clk_hsi {
	status = "okay";
};

&clk_hsi48 {
	status = "okay";
	crs-usb-sof;
};

&pll {
	div-m = <1>;
	mul-n = <8>;
	div-p = <2>;
	div-q = <2>;
	div-r = <2>;
	clocks = <&clk_hsi>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(64)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <1>;
};

zephyr_udc0: &usb {
	pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
	pinctrl-names = "default";
	status = "okay";
};

&usart1 {
	pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&usart2 {
	pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&rtc {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
	status = "okay";
};

&iwdg {
	status = "okay";
};

&timers3 {
	st,prescaler = <10000>;
	status = "okay";
	pwm3: pwm {
		status = "okay";
		pinctrl-0 = <&tim3_ch1_pb4>;
		pinctrl-names = "default";
	};
};

&timers15 {
	st,prescaler = <10000>;
	status = "okay";
	pwm15: pwm {
		status = "okay";
		pinctrl-0 = <&tim15_ch1_pb14>;
		pinctrl-names = "default";
	};
};

&i2c1 {
	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&i2c2 {
	pinctrl-0 = <&i2c2_scl_pa11 &i2c2_sda_pa12>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&spi1 {
	pinctrl-0 = <&spi1_nss_pb0 &spi1_sck_pa5
		     &spi1_miso_pa6 &spi1_mosi_pa7>;
	pinctrl-names = "default";
	status = "okay";
};

&spi2 {
	pinctrl-0 = <&spi2_nss_pd0 &spi2_sck_pd1
		     &spi2_miso_pd3 &spi2_mosi_pd4>;
	pinctrl-names = "default";
	status = "okay";
};

&adc1 {
	pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1>;
	pinctrl-names = "default";
	st,adc-clock-source = <SYNC>;
	st,adc-prescaler = <4>;
	status = "okay";
};

&die_temp {
	status = "okay";
};

&dac1 {
	status = "okay";
	pinctrl-0 = <&dac1_out1_pa4>;
	pinctrl-names = "default";
};

&fdcan1 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>,
		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
	pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
	pinctrl-names = "default";
	status = "okay";
};

&fdcan2 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>,
		 <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>;
	pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>;
	pinctrl-names = "default";
	status = "okay";
};

&flash0 {
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(48)>;
			read-only;
		};
		slot0_partition: partition@C000 {
			label = "image-0";
			reg = <0x0000C000 DT_SIZE_K(200)>;
		};
		slot1_partition: partition@3E000 {
			label = "image-1";
			reg = <0x0003E000 DT_SIZE_K(200)>;
		};
		/* final 64KiB reserved for app storage partition */
		storage_partition: partition@70000 {
			label = "storage";
			reg = <0x00070000 DT_SIZE_K(64)>;
		};
	};
};

stm32_lp_tick_source: &lptim1 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
		 <&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
	status = "okay";
};

&vref {
	status = "okay";
};

&vbat {
	status = "okay";
};