356 lines
9.8 KiB
C
356 lines
9.8 KiB
C
/*
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* Copyright (c) 2023 SILA Embedded Solutions GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT maxim_max31790_pwm
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#include <zephyr/device.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/mfd/max31790.h>
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#include <zephyr/drivers/pwm.h>
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#include <zephyr/drivers/pwm/max31790.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(pwm_max31790, CONFIG_PWM_LOG_LEVEL);
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struct max31790_pwm_config {
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struct i2c_dt_spec i2c;
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};
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struct max31790_pwm_data {
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struct k_mutex lock;
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};
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static void max31790_set_fandynamics_speedrange(uint8_t *destination, uint8_t value)
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{
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uint8_t length = MAX37190_FANXDYNAMICS_SPEEDRANGE_LENGTH;
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uint8_t pos = MAX37190_FANXDYNAMICS_SPEEDRANGE_POS;
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*destination &= ~GENMASK(pos + length - 1, pos);
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*destination |= FIELD_PREP(GENMASK(pos + length - 1, pos), value);
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}
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static void max31790_set_fandynamics_pwmrateofchange(uint8_t *destination, uint8_t value)
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{
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uint8_t length = MAX37190_FANXDYNAMICS_PWMRATEOFCHANGE_LENGTH;
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uint8_t pos = MAX37190_FANXDYNAMICS_PWMRATEOFCHANGE_POS;
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*destination &= ~GENMASK(pos + length - 1, pos);
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*destination |= FIELD_PREP(GENMASK(pos + length - 1, pos), value);
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}
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static void max31790_set_pwmfrequency(uint8_t *destination, uint8_t channel, uint8_t value)
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{
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uint8_t length = MAX37190_PWMFREQUENCY_PWM_LENGTH;
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uint8_t pos = (channel / 3) * 4;
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*destination &= ~GENMASK(pos + length - 1, pos);
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*destination |= FIELD_PREP(GENMASK(pos + length - 1, pos), value);
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}
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static uint8_t max31790_get_pwmfrequency(uint8_t value, uint8_t channel)
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{
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uint8_t length = MAX37190_PWMFREQUENCY_PWM_LENGTH;
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uint8_t pos = (channel / 3) * 4;
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return FIELD_GET(GENMASK(pos + length - 1, pos), value);
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}
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static void max31790_set_fanconfiguration_spinup(uint8_t *destination, uint8_t value)
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{
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uint8_t length = MAX37190_FANXCONFIGURATION_SPINUP_LENGTH;
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uint8_t pos = MAX37190_FANXCONFIGURATION_SPINUP_POS;
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*destination &= ~GENMASK(pos + length - 1, pos);
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*destination |= FIELD_PREP(GENMASK(pos + length - 1, pos), value);
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}
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static bool max31790_convert_pwm_frequency_into_hz(uint16_t *result, uint8_t pwm_frequency)
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{
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switch (pwm_frequency) {
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case 0:
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*result = 25;
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return true;
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case 1:
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*result = 30;
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return true;
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case 2:
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*result = 35;
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return true;
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case 3:
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*result = 100;
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return true;
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case 4:
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*result = 125;
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return true;
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case 5:
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*result = 150; /* actually 149.7, according to the datasheet */
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return true;
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case 6:
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*result = 1250;
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return true;
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case 7:
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*result = 1470;
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return true;
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case 8:
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*result = 3570;
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return true;
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case 9:
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*result = 5000;
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return true;
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case 10:
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*result = 12500;
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return true;
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case 11:
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*result = 25000;
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return true;
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default:
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LOG_ERR("invalid value %i for PWM frequency register", pwm_frequency);
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return false;
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}
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}
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static bool max31790_convert_pwm_frequency_into_register(uint8_t *result, uint32_t pwm_frequency)
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{
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switch (pwm_frequency) {
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case 25:
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*result = 0;
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return true;
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case 30:
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*result = 1;
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return true;
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case 35:
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*result = 2;
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return true;
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case 100:
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*result = 3;
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return true;
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case 125:
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*result = 4;
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return true;
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case 150: /* actually 149.7, according to the datasheet */
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*result = 5;
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return true;
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case 1250:
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*result = 6;
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return true;
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case 1470:
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*result = 7;
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return true;
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case 3570:
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*result = 8;
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return true;
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case 5000:
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*result = 9;
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return true;
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case 12500:
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*result = 10;
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return true;
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case 25000:
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*result = 11;
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return true;
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default:
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LOG_ERR("invalid value %i for PWM frequency in Hz", pwm_frequency);
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return false;
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}
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}
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static int max31790_set_cycles_internal(const struct device *dev, uint32_t channel,
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uint32_t period_count, uint32_t pulse_count,
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pwm_flags_t flags)
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{
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const struct max31790_pwm_config *config = dev->config;
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int result;
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uint8_t pwm_frequency_channel_value;
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uint8_t value_pwm_frequency;
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uint8_t value_fan_configuration;
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uint8_t value_fan_dynamics;
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uint8_t value_speed_range = MAX31790_FLAG_SPEED_RANGE_GET(flags);
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uint8_t value_pwm_rate_of_change = MAX31790_FLAG_PWM_RATE_OF_CHANGE_GET(flags);
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uint8_t buffer[3];
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if (!max31790_convert_pwm_frequency_into_register(&pwm_frequency_channel_value,
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period_count)) {
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return -EINVAL;
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}
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result = i2c_reg_read_byte_dt(&config->i2c, MAX37190_REGISTER_PWMFREQUENCY,
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&value_pwm_frequency);
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if (result != 0) {
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return result;
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}
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max31790_set_pwmfrequency(&value_pwm_frequency, channel, pwm_frequency_channel_value);
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result = i2c_reg_write_byte_dt(&config->i2c, MAX37190_REGISTER_PWMFREQUENCY,
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value_pwm_frequency);
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if (result != 0) {
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return result;
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}
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value_fan_configuration = 0;
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value_fan_dynamics = 0;
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if (flags & PWM_MAX31790_FLAG_SPIN_UP) {
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max31790_set_fanconfiguration_spinup(&value_fan_configuration, 2);
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} else {
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max31790_set_fanconfiguration_spinup(&value_fan_configuration, 0);
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}
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value_fan_configuration &= ~MAX37190_FANXCONFIGURATION_MONITOR_BIT;
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value_fan_configuration &= ~MAX37190_FANXCONFIGURATION_LOCKEDROTOR_BIT;
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value_fan_configuration &= ~MAX37190_FANXCONFIGURATION_LOCKEDROTORPOLARITY_BIT;
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value_fan_configuration &= ~MAX37190_FANXCONFIGURATION_TACH_BIT;
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value_fan_configuration |= MAX37190_FANXCONFIGURATION_TACHINPUTENABLED_BIT;
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max31790_set_fandynamics_speedrange(&value_fan_dynamics, value_speed_range);
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max31790_set_fandynamics_pwmrateofchange(&value_fan_dynamics, value_pwm_rate_of_change);
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value_fan_dynamics |= MAX37190_FANXDYNAMICS_ASYMMETRICRATEOFCHANGE_BIT;
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if ((flags & PWM_MAX31790_FLAG_RPM_MODE) == 0) {
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LOG_DBG("PWM mode");
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uint16_t tach_target_count = MAX31790_TACHTARGETCOUNT_MAXIMUM;
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value_fan_configuration &= ~MAX37190_FANXCONFIGURATION_MODE_BIT;
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buffer[0] = MAX31790_REGISTER_TACHTARGETCOUNTMSB(channel);
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sys_put_be16(tach_target_count << 5, buffer + 1);
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result = i2c_write_dt(&config->i2c, buffer, sizeof(buffer));
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} else {
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LOG_DBG("RPM mode");
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value_fan_configuration |= MAX37190_FANXCONFIGURATION_MODE_BIT;
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buffer[0] = MAX31790_REGISTER_TACHTARGETCOUNTMSB(channel);
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sys_put_be16(pulse_count << 5, buffer + 1);
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result = i2c_write_dt(&config->i2c, buffer, sizeof(buffer));
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}
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if (result != 0) {
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return result;
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}
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result = i2c_reg_write_byte_dt(&config->i2c, MAX37190_REGISTER_FANCONFIGURATION(channel),
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value_fan_configuration);
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if (result != 0) {
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return result;
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}
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result = i2c_reg_write_byte_dt(&config->i2c, MAX31790_REGISTER_FANDYNAMICS(channel),
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value_fan_dynamics);
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if (result != 0) {
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return result;
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}
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if ((flags & PWM_MAX31790_FLAG_RPM_MODE) == 0) {
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uint16_t pwm_target_duty_cycle =
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pulse_count * MAX31790_PWMTARGETDUTYCYCLE_MAXIMUM / period_count;
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buffer[0] = MAX31790_REGISTER_PWMOUTTARGETDUTYCYCLEMSB(channel);
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sys_put_be16(pwm_target_duty_cycle << 7, buffer + 1);
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result = i2c_write_dt(&config->i2c, buffer, sizeof(buffer));
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if (result != 0) {
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return result;
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}
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}
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return 0;
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}
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static int max31790_set_cycles(const struct device *dev, uint32_t channel, uint32_t period_count,
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uint32_t pulse_count, pwm_flags_t flags)
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{
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struct max31790_pwm_data *data = dev->data;
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int result;
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LOG_DBG("set period %i with pulse %i for channel %i and flags 0x%04X", period_count,
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pulse_count, channel, flags);
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if (channel > MAX31790_CHANNEL_COUNT) {
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LOG_ERR("invalid channel number %i", channel);
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return -EINVAL;
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}
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if (period_count == 0) {
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LOG_ERR("period count must be > 0");
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return -EINVAL;
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}
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k_mutex_lock(&data->lock, K_FOREVER);
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result = max31790_set_cycles_internal(dev, channel, period_count, pulse_count, flags);
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k_mutex_unlock(&data->lock);
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return result;
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}
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static int max31790_get_cycles_per_sec(const struct device *dev, uint32_t channel, uint64_t *cycles)
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{
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const struct max31790_pwm_config *config = dev->config;
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struct max31790_pwm_data *data = dev->data;
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int result;
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bool success;
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uint8_t pwm_frequency_register;
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uint8_t pwm_frequency = 1;
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uint16_t pwm_frequency_in_hz;
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if (channel > MAX31790_CHANNEL_COUNT) {
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LOG_ERR("invalid channel number %i", channel);
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return -EINVAL;
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}
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k_mutex_lock(&data->lock, K_FOREVER);
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result = i2c_reg_read_byte_dt(&config->i2c, MAX37190_REGISTER_GLOBALCONFIGURATION,
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&pwm_frequency_register);
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if (result != 0) {
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k_mutex_unlock(&data->lock);
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return result;
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}
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pwm_frequency = max31790_get_pwmfrequency(pwm_frequency_register, channel);
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success = max31790_convert_pwm_frequency_into_hz(&pwm_frequency_in_hz, pwm_frequency);
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if (!success) {
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k_mutex_unlock(&data->lock);
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return -EINVAL;
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}
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*cycles = pwm_frequency_in_hz;
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k_mutex_unlock(&data->lock);
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return 0;
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}
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static const struct pwm_driver_api max31790_pwm_api = {
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.set_cycles = max31790_set_cycles,
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.get_cycles_per_sec = max31790_get_cycles_per_sec,
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};
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static int max31790_pwm_init(const struct device *dev)
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{
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const struct max31790_pwm_config *config = dev->config;
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struct max31790_pwm_data *data = dev->data;
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k_mutex_init(&data->lock);
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if (!i2c_is_ready_dt(&config->i2c)) {
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LOG_ERR("I2C device not ready");
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return -ENODEV;
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}
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return 0;
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}
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#define MAX31790_PWM_INIT(inst) \
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static const struct max31790_pwm_config max31790_pwm_##inst##_config = { \
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.i2c = I2C_DT_SPEC_GET(DT_INST_PARENT(inst)), \
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}; \
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\
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static struct max31790_pwm_data max31790_pwm_##inst##_data; \
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\
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DEVICE_DT_INST_DEFINE(inst, max31790_pwm_init, NULL, &max31790_pwm_##inst##_data, \
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&max31790_pwm_##inst##_config, POST_KERNEL, \
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CONFIG_PWM_INIT_PRIORITY, &max31790_pwm_api);
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DT_INST_FOREACH_STATUS_OKAY(MAX31790_PWM_INIT);
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