398 lines
12 KiB
C
398 lines
12 KiB
C
/*
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* Copyright (c) 2024 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define LOG_LEVEL CONFIG_FLASH_LOG_LEVEL
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#include <zephyr/logging/log.h>
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#include <string.h>
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#include <soc.h>
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/init.h>
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#include <zephyr/irq.h>
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#include "flash_hp_ra.h"
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#define DT_DRV_COMPAT renesas_ra_flash_hp_controller
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LOG_MODULE_REGISTER(flash_hp_ra, CONFIG_FLASH_LOG_LEVEL);
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#define ERASE_BLOCK_SIZE_0 DT_PROP(DT_INST(0, renesas_ra_nv_flash), erase_block_size)
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#define ERASE_BLOCK_SIZE_1 DT_PROP(DT_INST(1, renesas_ra_nv_flash), erase_block_size)
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BUILD_ASSERT((ERASE_BLOCK_SIZE_0 % FLASH_HP_CF_BLOCK_8KB_SIZE) == 0,
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"erase-block-size expected to be a multiple of a block size");
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BUILD_ASSERT((ERASE_BLOCK_SIZE_1 % FLASH_HP_DF_BLOCK_SIZE) == 0,
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"erase-block-size expected to be a multiple of a block size");
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/* Flags, set from Callback function */
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static volatile struct event_flash g_event_flash = {
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.erase_complete = false,
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.write_complete = false,
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};
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void fcu_frdyi_isr(void);
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void fcu_fiferr_isr(void);
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static int flash_controller_ra_init(const struct device *dev);
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static int flash_ra_init(const struct device *dev);
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static int flash_ra_erase(const struct device *dev, off_t offset, size_t len);
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static int flash_ra_read(const struct device *dev, off_t offset, void *data, size_t len);
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static int flash_ra_write(const struct device *dev, off_t offset, const void *data, size_t len);
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static const struct flash_parameters *flash_ra_get_parameters(const struct device *dev);
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#ifdef CONFIG_FLASH_PAGE_LAYOUT
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void flash_ra_page_layout(const struct device *dev, const struct flash_pages_layout **layout,
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size_t *layout_size);
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#endif
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#ifdef CONFIG_FLASH_EX_OP_ENABLED
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static int flash_ra_ex_op(const struct device *dev, uint16_t code, const uintptr_t in, void *out);
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#endif
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static const struct flash_driver_api flash_ra_api = {
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.erase = flash_ra_erase,
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.write = flash_ra_write,
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.read = flash_ra_read,
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.get_parameters = flash_ra_get_parameters,
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#ifdef CONFIG_FLASH_PAGE_LAYOUT
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.page_layout = flash_ra_page_layout,
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#endif
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#ifdef CONFIG_FLASH_EX_OP_ENABLED
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.ex_op = flash_ra_ex_op,
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#endif
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};
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static struct flash_pages_layout flash_ra_layout[5];
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void bgo_callback(flash_callback_args_t *p_args)
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{
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if (FLASH_EVENT_ERASE_COMPLETE == p_args->event) {
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g_event_flash.erase_complete = true;
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} else {
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g_event_flash.write_complete = true;
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}
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}
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static bool flash_ra_valid_range(off_t area_size, off_t offset, size_t len)
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{
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if ((offset < 0) || (offset >= area_size) || ((area_size - offset) < len)) {
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return false;
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}
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return true;
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}
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static int flash_ra_read(const struct device *dev, off_t offset, void *data, size_t len)
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{
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struct flash_hp_ra_data *flash_data = dev->data;
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if (!flash_ra_valid_range(flash_data->area_size, offset, len)) {
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return -EINVAL;
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}
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if (!len) {
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return 0;
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}
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LOG_DBG("flash: read 0x%lx, len: %u", (long)(offset + flash_data->area_address), len);
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memcpy(data, (uint8_t *)(offset + flash_data->area_address), len);
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return 0;
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}
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static int flash_ra_erase(const struct device *dev, off_t offset, size_t len)
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{
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struct flash_hp_ra_data *flash_data = dev->data;
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struct flash_hp_ra_controller *dev_ctrl = flash_data->controller;
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static struct flash_pages_info page_info_off, page_info_len;
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fsp_err_t err = FSP_ERR_ASSERTION;
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uint32_t block_num;
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int rc, rc2;
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if (!flash_ra_valid_range(flash_data->area_size, offset, len)) {
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return -EINVAL;
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}
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if (!len) {
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return 0;
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}
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LOG_DBG("flash: erase 0x%lx, len: %u", (long)(offset + flash_data->area_address), len);
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rc = flash_get_page_info_by_offs(dev, offset, &page_info_off);
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if (rc != 0) {
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return -EINVAL;
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}
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if (offset != page_info_off.start_offset) {
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return -EINVAL;
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}
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rc2 = flash_get_page_info_by_offs(dev, (offset + len), &page_info_len);
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if (rc2 != 0) {
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return -EINVAL;
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}
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#if defined(CONFIG_DUAL_BANK_MODE)
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/* Invalid offset in dual bank mode, this is reversed area. */
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if ((page_info_off.index > FLASH_HP_CF_BLOCK_32KB_DUAL_LOW_END &&
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page_info_off.index < FLASH_HP_CF_BLOCK_8KB_HIGH_START) ||
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(page_info_len.index > FLASH_HP_CF_BLOCK_32KB_DUAL_LOW_END &&
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page_info_len.index < FLASH_HP_CF_BLOCK_8KB_HIGH_START)) {
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return -EIO;
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}
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#endif
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if ((offset + len) != (page_info_len.start_offset)) {
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return -EIO;
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}
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block_num = (uint32_t)((page_info_len.index) - page_info_off.index);
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if (block_num > 0) {
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k_sem_take(&dev_ctrl->ctrl_sem, K_FOREVER);
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err = R_FLASH_HP_Erase(&dev_ctrl->flash_ctrl,
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(long)(flash_data->area_address + offset), block_num);
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if (err != FSP_SUCCESS) {
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k_sem_give(&dev_ctrl->ctrl_sem);
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return -EIO;
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}
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if (flash_data->FlashRegion == DATA_FLASH) {
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/* Wait for the erase complete event flag, if BGO is SET */
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if (true == dev_ctrl->fsp_config.data_flash_bgo) {
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while (!g_event_flash.erase_complete) {
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k_sleep(K_USEC(10));
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}
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g_event_flash.erase_complete = false;
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}
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}
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k_sem_give(&dev_ctrl->ctrl_sem);
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}
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return 0;
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}
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static int flash_ra_write(const struct device *dev, off_t offset, const void *data, size_t len)
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{
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fsp_err_t err = FSP_ERR_ASSERTION;
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struct flash_hp_ra_data *flash_data = dev->data;
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struct flash_hp_ra_controller *dev_ctrl = flash_data->controller;
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if (!flash_ra_valid_range(flash_data->area_size, offset, len)) {
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return -EINVAL;
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}
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if (!len) {
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return 0;
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}
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LOG_DBG("flash: write 0x%lx, len: %u", (long)(offset + flash_data->area_address), len);
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k_sem_take(&dev_ctrl->ctrl_sem, K_FOREVER);
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err = R_FLASH_HP_Write(&dev_ctrl->flash_ctrl, (uint32_t)data,
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(long)(offset + flash_data->area_address), len);
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if (err != FSP_SUCCESS) {
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k_sem_give(&dev_ctrl->ctrl_sem);
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return -EIO;
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}
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if (flash_data->FlashRegion == DATA_FLASH) {
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/* Wait for the write complete event flag, if BGO is SET */
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if (true == dev_ctrl->fsp_config.data_flash_bgo) {
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while (!g_event_flash.write_complete) {
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k_sleep(K_USEC(10));
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}
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g_event_flash.write_complete = false;
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}
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}
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k_sem_give(&dev_ctrl->ctrl_sem);
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return 0;
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}
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void flash_ra_page_layout(const struct device *dev, const struct flash_pages_layout **layout,
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size_t *layout_size)
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{
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struct flash_hp_ra_data *flash_data = dev->data;
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if (flash_data->FlashRegion == DATA_FLASH) {
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flash_ra_layout[0].pages_count = flash_data->area_size / FLASH_HP_DF_BLOCK_SIZE;
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flash_ra_layout[0].pages_size = FLASH_HP_DF_BLOCK_SIZE;
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*layout_size = 1;
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} else {
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#if defined(CONFIG_DUAL_BANK_MODE)
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flash_ra_layout[0].pages_count =
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(FLASH_HP_CF_BLOCK_8KB_LOW_END - FLASH_HP_CF_BLOCK_8KB_LOW_START) + 1;
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flash_ra_layout[0].pages_size = FLASH_HP_CF_BLOCK_8KB_SIZE;
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flash_ra_layout[1].pages_count = (FLASH_HP_CF_BLOCK_32KB_DUAL_LOW_END -
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FLASH_HP_CF_BLOCK_32KB_DUAL_LOW_START) +
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1;
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flash_ra_layout[1].pages_size = FLASH_HP_CF_BLOCK_32KB_SIZE;
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flash_ra_layout[2].pages_count = FLASH_RESERVED_AREA_NUM;
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flash_ra_layout[2].pages_size =
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(FLASH_HP_BANK2_OFFSET -
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(flash_ra_layout[0].pages_count * flash_ra_layout[0].pages_size) -
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(flash_ra_layout[1].pages_count * flash_ra_layout[1].pages_size)) /
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FLASH_RESERVED_AREA_NUM;
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flash_ra_layout[3].pages_count =
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(FLASH_HP_CF_BLOCK_8KB_HIGH_END - FLASH_HP_CF_BLOCK_8KB_HIGH_START) + 1;
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flash_ra_layout[3].pages_size = FLASH_HP_CF_BLOCK_8KB_SIZE;
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/* The final block is the dummy block */
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flash_ra_layout[4].pages_count = (FLASH_HP_CF_BLOCK_32KB_DUAL_HIGH_END + 1 -
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FLASH_HP_CF_BLOCK_32KB_DUAL_HIGH_START) +
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1;
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flash_ra_layout[4].pages_size = FLASH_HP_CF_BLOCK_32KB_SIZE;
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*layout_size = 5;
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#else
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flash_ra_layout[0].pages_count =
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(FLASH_HP_CF_BLOCK_8KB_LOW_END - FLASH_HP_CF_BLOCK_8KB_LOW_START) + 1;
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flash_ra_layout[0].pages_size = FLASH_HP_CF_BLOCK_8KB_SIZE;
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flash_ra_layout[1].pages_count =
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(FLASH_HP_CF_BLOCK_32KB_LINEAR_END - FLASH_HP_CF_BLOCK_32KB_LINEAR_START) +
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1;
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flash_ra_layout[1].pages_size = FLASH_HP_CF_BLOCK_32KB_SIZE;
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*layout_size = 2;
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#endif
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}
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*layout = flash_ra_layout;
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}
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static const struct flash_parameters *flash_ra_get_parameters(const struct device *dev)
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{
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const struct flash_hp_ra_config *config = dev->config;
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return &config->flash_ra_parameters;
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}
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static struct flash_hp_ra_controller flash_hp_ra_controller = {
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.fsp_config = {
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.data_flash_bgo = true,
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.p_callback = bgo_callback,
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.p_context = NULL,
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.irq = (IRQn_Type)DT_INST_IRQ_BY_NAME(0, frdyi, irq),
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.err_irq = (IRQn_Type)DT_INST_IRQ_BY_NAME(0, fiferr, irq),
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.err_ipl = DT_INST_IRQ_BY_NAME(0, fiferr, priority),
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.ipl = DT_INST_IRQ_BY_NAME(0, frdyi, priority),
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}};
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#ifdef CONFIG_FLASH_EX_OP_ENABLED
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static int flash_ra_ex_op(const struct device *dev, uint16_t code, const uintptr_t in, void *out)
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{
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int err = -ENOTSUP;
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switch (code) {
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#if defined(CONFIG_FLASH_RA_WRITE_PROTECT)
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case FLASH_RA_EX_OP_WRITE_PROTECT:
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err = flash_ra_ex_op_write_protect(dev, in, out);
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break;
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#endif /* CONFIG_FLASH_RA_WRITE_PROTECT */
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default:
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break;
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}
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return err;
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}
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#endif
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static int flash_ra_init(const struct device *dev)
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{
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const struct device *dev_ctrl = DEVICE_DT_INST_GET(0);
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struct flash_hp_ra_data *flash_data = dev->data;
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if (!device_is_ready(dev_ctrl)) {
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return -ENODEV;
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}
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if (flash_data->area_address == FLASH_HP_DF_START) {
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flash_data->FlashRegion = DATA_FLASH;
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} else {
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flash_data->FlashRegion = CODE_FLASH;
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}
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flash_data->controller = dev_ctrl->data;
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return 0;
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}
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static void flash_controller_ra_irq_config_func(const struct device *dev)
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{
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ARG_UNUSED(dev);
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R_ICU->IELSR[DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, irq)] = ELC_EVENT_FCU_FRDYI;
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R_ICU->IELSR[DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, irq)] = ELC_EVENT_FCU_FIFERR;
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IRQ_CONNECT(DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, irq),
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DT_IRQ_BY_NAME(DT_DRV_INST(0), frdyi, priority), fcu_frdyi_isr,
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DEVICE_DT_INST_GET(0), 0);
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IRQ_CONNECT(DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, irq),
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DT_IRQ_BY_NAME(DT_DRV_INST(0), fiferr, priority), fcu_fiferr_isr,
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DEVICE_DT_INST_GET(0), 0);
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irq_enable(DT_INST_IRQ_BY_NAME(0, frdyi, irq));
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irq_enable(DT_INST_IRQ_BY_NAME(0, fiferr, irq));
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}
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static int flash_controller_ra_init(const struct device *dev)
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{
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fsp_err_t err = FSP_SUCCESS;
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const struct flash_hp_ra_controller_config *cfg = dev->config;
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struct flash_hp_ra_controller *data = dev->data;
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cfg->irq_config(dev);
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err = R_FLASH_HP_Open(&data->flash_ctrl, &data->fsp_config);
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if (err != FSP_SUCCESS) {
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LOG_DBG("flash: open error=%d", (int)err);
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return -EIO;
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}
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k_sem_init(&data->ctrl_sem, 1, 1);
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return 0;
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}
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static struct flash_hp_ra_controller_config flash_hp_ra_controller_config = {
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.irq_config = flash_controller_ra_irq_config_func,
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};
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#define RA_FLASH_INIT(index) \
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struct flash_hp_ra_data flash_hp_ra_data_##index = {.area_address = DT_REG_ADDR(index), \
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.area_size = DT_REG_SIZE(index)}; \
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static struct flash_hp_ra_config flash_hp_ra_config_##index = { \
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.flash_ra_parameters = { \
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.write_block_size = GET_SIZE( \
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(CHECK_EQ(DT_REG_ADDR(index), FLASH_HP_DF_START)), 4, 128), \
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.erase_value = 0xff, \
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}}; \
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\
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DEVICE_DT_DEFINE(index, flash_ra_init, NULL, &flash_hp_ra_data_##index, \
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&flash_hp_ra_config_##index, POST_KERNEL, CONFIG_FLASH_INIT_PRIORITY, \
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&flash_ra_api);
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DT_FOREACH_CHILD_STATUS_OKAY(DT_DRV_INST(0), RA_FLASH_INIT);
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/* define the flash controller device just to run the init. */
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DEVICE_DT_DEFINE(DT_DRV_INST(0), flash_controller_ra_init, NULL, &flash_hp_ra_controller,
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&flash_hp_ra_controller_config, PRE_KERNEL_1, CONFIG_FLASH_INIT_PRIORITY, NULL);
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