155 lines
8.0 KiB
C
155 lines
8.0 KiB
C
/*
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* Copyright (c) 2020 Teslabs Engineering S.L.
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* Copyright (c) 2021 Krivorot Oleg <krivorot.oleg@gmail.com>
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* Copyright (c) 2022 Konstantinos Papadopoulos <kostas.papadopulos@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9341_H_
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#define ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9341_H_
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#include <zephyr/device.h>
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/* Commands/registers. */
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#define ILI9341_GAMSET 0x26
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#define ILI9341_IFMODE 0xB0
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#define ILI9341_FRMCTR1 0xB1
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#define ILI9341_DISCTRL 0xB6
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#define ILI9341_ETMOD 0xB7
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#define ILI9341_PWCTRL1 0xC0
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#define ILI9341_PWCTRL2 0xC1
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#define ILI9341_VMCTRL1 0xC5
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#define ILI9341_VMCTRL2 0xC7
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#define ILI9341_PWCTRLA 0xCB
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#define ILI9341_PWCTRLB 0xCF
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#define ILI9341_PGAMCTRL 0xE0
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#define ILI9341_NGAMCTRL 0xE1
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#define ILI9341_TIMCTRLA 0xE8
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#define ILI9341_TIMCTRLB 0xEA
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#define ILI9341_PWSEQCTRL 0xED
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#define ILI9341_ENABLE3G 0xF2
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#define ILI9341_IFCTL 0xF6
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#define ILI9341_PUMPRATIOCTRL 0xF7
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/* Commands/registers length. */
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#define ILI9341_GAMSET_LEN 1U
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#define ILI9341_IFMODE_LEN 1U
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#define ILI9341_FRMCTR1_LEN 2U
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#define ILI9341_DISCTRL_LEN 4U
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#define ILI9341_PWCTRL1_LEN 1U
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#define ILI9341_PWCTRL2_LEN 1U
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#define ILI9341_VMCTRL1_LEN 2U
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#define ILI9341_VMCTRL2_LEN 1U
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#define ILI9341_PGAMCTRL_LEN 15U
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#define ILI9341_NGAMCTRL_LEN 15U
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#define ILI9341_PWCTRLA_LEN 5U
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#define ILI9341_PWCTRLB_LEN 3U
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#define ILI9341_PWSEQCTRL_LEN 4U
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#define ILI9341_TIMCTRLA_LEN 3U
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#define ILI9341_TIMCTRLB_LEN 2U
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#define ILI9341_PUMPRATIOCTRL_LEN 1U
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#define ILI9341_ENABLE3G_LEN 1U
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#define ILI9341_IFCTL_LEN 3U
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#define ILI9341_ETMOD_LEN 1U
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/** X resolution (pixels). */
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#define ILI9341_X_RES 240U
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/** Y resolution (pixels). */
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#define ILI9341_Y_RES 320U
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/** ILI9341 registers to be initialized. */
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struct ili9341_regs {
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uint8_t gamset[ILI9341_GAMSET_LEN];
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uint8_t ifmode[ILI9341_IFMODE_LEN];
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uint8_t frmctr1[ILI9341_FRMCTR1_LEN];
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uint8_t disctrl[ILI9341_DISCTRL_LEN];
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uint8_t pwctrl1[ILI9341_PWCTRL1_LEN];
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uint8_t pwctrl2[ILI9341_PWCTRL2_LEN];
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uint8_t vmctrl1[ILI9341_VMCTRL1_LEN];
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uint8_t vmctrl2[ILI9341_VMCTRL2_LEN];
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uint8_t pgamctrl[ILI9341_PGAMCTRL_LEN];
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uint8_t ngamctrl[ILI9341_NGAMCTRL_LEN];
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uint8_t pwctrla[ILI9341_PWCTRLA_LEN];
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uint8_t pwctrlb[ILI9341_PWCTRLB_LEN];
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uint8_t pwseqctrl[ILI9341_PWSEQCTRL_LEN];
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uint8_t timctrla[ILI9341_TIMCTRLA_LEN];
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uint8_t timctrlb[ILI9341_TIMCTRLB_LEN];
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uint8_t pumpratioctrl[ILI9341_PUMPRATIOCTRL_LEN];
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uint8_t enable3g[ILI9341_ENABLE3G_LEN];
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uint8_t ifctl[ILI9341_IFCTL_LEN];
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uint8_t etmod[ILI9341_ETMOD_LEN];
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};
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/* Initializer macro for ILI9341 registers. */
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#define ILI9341_REGS_INIT(n) \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), gamset) == ILI9341_GAMSET_LEN, \
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"ili9341: Error length gamma set (GAMSET) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ifmode) == ILI9341_IFMODE_LEN, \
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"ili9341: Error length frame rate control (IFMODE) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), frmctr1) == ILI9341_FRMCTR1_LEN, \
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"ili9341: Error length frame rate control (FRMCTR1) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), disctrl) == ILI9341_DISCTRL_LEN, \
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"ili9341: Error length display function control (DISCTRL) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrl1) == ILI9341_PWCTRL1_LEN, \
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"ili9341: Error length power control 1 (PWCTRL1) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrl2) == ILI9341_PWCTRL2_LEN, \
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"ili9341: Error length power control 2 (PWCTRL2) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), vmctrl1) == ILI9341_VMCTRL1_LEN, \
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"ili9341: Error length VCOM control 1 (VMCTRL1) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), vmctrl2) == ILI9341_VMCTRL2_LEN, \
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"ili9341: Error length VCOM control 2 (VMCTRL2) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pgamctrl) == ILI9341_PGAMCTRL_LEN, \
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"ili9341: Error length positive gamma correction (PGAMCTRL) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ngamctrl) == ILI9341_NGAMCTRL_LEN, \
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"ili9341: Error length negative gamma correction (NGAMCTRL) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrla) == ILI9341_PWCTRLA_LEN, \
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"ili9341: Error length power control A (PWCTRLA) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwctrlb) == ILI9341_PWCTRLB_LEN, \
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"ili9341: Error length power control B (PWCTRLB) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pwseqctrl) == ILI9341_PWSEQCTRL_LEN, \
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"ili9341: Error length power on sequence control (PWSEQCTRL) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), timctrla) == ILI9341_TIMCTRLA_LEN, \
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"ili9341: Error length driver timing control A (TIMCTRLA) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), timctrlb) == ILI9341_TIMCTRLB_LEN, \
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"ili9341: Error length driver timing control B (TIMCTRLB) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), pumpratioctrl) == \
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ILI9341_PUMPRATIOCTRL_LEN, \
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"ili9341: Error length Pump ratio control (PUMPRATIOCTRL) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), enable3g) == ILI9341_ENABLE3G_LEN, \
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"ili9341: Error length enable 3G (ENABLE3G) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), ifctl) == ILI9341_IFCTL_LEN, \
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"ili9341: Error length frame rate control (IFCTL) register"); \
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BUILD_ASSERT(DT_PROP_LEN(DT_INST(n, ilitek_ili9341), etmod) == ILI9341_ETMOD_LEN, \
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"ili9341: Error length entry Mode Set (ETMOD) register"); \
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static const struct ili9341_regs ili9xxx_regs_##n = { \
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.gamset = DT_PROP(DT_INST(n, ilitek_ili9341), gamset), \
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.ifmode = DT_PROP(DT_INST(n, ilitek_ili9341), ifmode), \
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.frmctr1 = DT_PROP(DT_INST(n, ilitek_ili9341), frmctr1), \
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.disctrl = DT_PROP(DT_INST(n, ilitek_ili9341), disctrl), \
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.pwctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl1), \
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.pwctrl2 = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrl2), \
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.vmctrl1 = DT_PROP(DT_INST(n, ilitek_ili9341), vmctrl1), \
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.vmctrl2 = DT_PROP(DT_INST(n, ilitek_ili9341), vmctrl2), \
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.pgamctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pgamctrl), \
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.ngamctrl = DT_PROP(DT_INST(n, ilitek_ili9341), ngamctrl), \
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.pwctrla = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrla), \
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.pwctrlb = DT_PROP(DT_INST(n, ilitek_ili9341), pwctrlb), \
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.pwseqctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pwseqctrl), \
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.timctrla = DT_PROP(DT_INST(n, ilitek_ili9341), timctrla), \
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.timctrlb = DT_PROP(DT_INST(n, ilitek_ili9341), timctrlb), \
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.pumpratioctrl = DT_PROP(DT_INST(n, ilitek_ili9341), pumpratioctrl), \
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.enable3g = DT_PROP(DT_INST(n, ilitek_ili9341), enable3g), \
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.ifctl = DT_PROP(DT_INST(n, ilitek_ili9341), ifctl), \
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.etmod = DT_PROP(DT_INST(n, ilitek_ili9341), etmod), \
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}
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/**
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* @brief Initialize ILI9341 registers with DT values.
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*
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* @param dev ILI9341 device instance
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* @return 0 on success, errno otherwise.
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*/
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int ili9341_regs_init(const struct device *dev);
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#endif /* ZEPHYR_DRIVERS_DISPLAY_DISPLAY_ILI9341_H_ */
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