383 lines
9.2 KiB
C
383 lines
9.2 KiB
C
/*
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* Copyright (c) 2019, Piotr Mienkowski
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT silabs_gecko_rtcc
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#include <stddef.h>
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#include <string.h>
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#include <errno.h>
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <soc.h>
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#include <em_cmu.h>
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#include <em_rtcc.h>
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#include <zephyr/drivers/counter.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(counter_gecko, CONFIG_COUNTER_LOG_LEVEL);
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#define RTCC_MAX_VALUE (_RTCC_CNT_MASK)
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#define RTCC_ALARM_NUM 2
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struct counter_gecko_config {
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struct counter_config_info info;
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void (*irq_config)(void);
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uint32_t prescaler;
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};
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struct counter_gecko_alarm_data {
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counter_alarm_callback_t callback;
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void *user_data;
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};
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struct counter_gecko_data {
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struct counter_gecko_alarm_data alarm[RTCC_ALARM_NUM];
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counter_top_callback_t top_callback;
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void *top_user_data;
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};
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#ifdef CONFIG_SOC_GECKO_HAS_ERRATA_RTCC_E201
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#define ERRATA_RTCC_E201_MESSAGE \
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"Errata RTCC_E201: In case RTCC prescaler != 1 the module does not " \
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"reset the counter value on CCV1 compare."
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#endif
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/* Map channel id to CC channel provided by the RTCC module */
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static uint8_t chan_id2cc_idx(uint8_t chan_id)
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{
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uint8_t cc_idx;
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switch (chan_id) {
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case 0:
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cc_idx = 2;
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break;
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default:
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cc_idx = 0;
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break;
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}
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return cc_idx;
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}
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static int counter_gecko_start(const struct device *dev)
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{
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ARG_UNUSED(dev);
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RTCC_Enable(true);
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return 0;
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}
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static int counter_gecko_stop(const struct device *dev)
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{
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ARG_UNUSED(dev);
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RTCC_Enable(false);
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return 0;
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}
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static int counter_gecko_get_value(const struct device *dev, uint32_t *ticks)
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{
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ARG_UNUSED(dev);
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*ticks = RTCC_CounterGet();
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return 0;
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}
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static int counter_gecko_set_top_value(const struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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struct counter_gecko_data *const dev_data = dev->data;
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uint32_t ticks;
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uint32_t flags;
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int err = 0;
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#ifdef CONFIG_SOC_GECKO_HAS_ERRATA_RTCC_E201
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const struct counter_gecko_config *const dev_cfg = dev->config;
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if (dev_cfg->prescaler != 1) {
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LOG_ERR(ERRATA_RTCC_E201_MESSAGE);
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return -EINVAL;
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}
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#endif
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/* Counter top value can only be changed when all alarms are disabled */
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for (int i = 0; i < RTCC_ALARM_NUM; i++) {
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if (dev_data->alarm[i].callback) {
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return -EBUSY;
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}
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}
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RTCC_IntClear(RTCC_IF_CC1);
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dev_data->top_callback = cfg->callback;
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dev_data->top_user_data = cfg->user_data;
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ticks = cfg->ticks;
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flags = cfg->flags;
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if (!(flags & COUNTER_TOP_CFG_DONT_RESET)) {
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RTCC_CounterSet(0);
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}
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RTCC_ChannelCCVSet(1, ticks);
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LOG_DBG("set top value: %u", ticks);
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if ((flags & COUNTER_TOP_CFG_DONT_RESET) &&
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RTCC_CounterGet() > ticks) {
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err = -ETIME;
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if (flags & COUNTER_TOP_CFG_RESET_WHEN_LATE) {
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RTCC_CounterSet(0);
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}
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}
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/* Enable the compare interrupt */
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RTCC_IntEnable(RTCC_IF_CC1);
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return err;
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}
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static uint32_t counter_gecko_get_top_value(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return RTCC_ChannelCCVGet(1);
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}
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static int counter_gecko_set_alarm(const struct device *dev, uint8_t chan_id,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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uint32_t count = RTCC_CounterGet();
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struct counter_gecko_data *const dev_data = dev->data;
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uint32_t top_value = counter_gecko_get_top_value(dev);
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uint32_t ccv;
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if ((top_value != 0) && (alarm_cfg->ticks > top_value)) {
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return -EINVAL;
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}
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if (dev_data->alarm[chan_id].callback != NULL) {
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return -EBUSY;
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}
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if ((alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) != 0) {
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ccv = alarm_cfg->ticks;
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} else {
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if (top_value == 0) {
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ccv = count + alarm_cfg->ticks;
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} else {
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uint64_t ccv64 = count + alarm_cfg->ticks;
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ccv = (uint32_t)(ccv64 % top_value);
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}
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}
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uint8_t cc_idx = chan_id2cc_idx(chan_id);
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RTCC_IntClear(RTCC_IF_CC0 << cc_idx);
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dev_data->alarm[chan_id].callback = alarm_cfg->callback;
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dev_data->alarm[chan_id].user_data = alarm_cfg->user_data;
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RTCC_ChannelCCVSet(cc_idx, ccv);
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LOG_DBG("set alarm: channel %u, count %u", chan_id, ccv);
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/* Enable the compare interrupt */
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RTCC_IntEnable(RTCC_IF_CC0 << cc_idx);
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return 0;
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}
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static int counter_gecko_cancel_alarm(const struct device *dev,
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uint8_t chan_id)
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{
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struct counter_gecko_data *const dev_data = dev->data;
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uint8_t cc_idx = chan_id2cc_idx(chan_id);
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/* Disable the compare interrupt */
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RTCC_IntDisable(RTCC_IF_CC0 << cc_idx);
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RTCC_IntClear(RTCC_IF_CC0 << cc_idx);
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dev_data->alarm[chan_id].callback = NULL;
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dev_data->alarm[chan_id].user_data = NULL;
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RTCC_ChannelCCVSet(cc_idx, 0);
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LOG_DBG("cancel alarm: channel %u", chan_id);
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return 0;
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}
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static uint32_t counter_gecko_get_pending_int(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return 0;
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}
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static int counter_gecko_init(const struct device *dev)
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{
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const struct counter_gecko_config *const dev_cfg = dev->config;
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RTCC_Init_TypeDef rtcc_config = {
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false, /* Don't start counting */
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false, /* Disable RTC during debug halt. */
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false, /* Don't wrap prescaler on CCV0 */
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true, /* Counter wrap on CCV1 */
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#if defined(_SILICON_LABS_32B_SERIES_2)
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(RTCC_CntPresc_TypeDef)(31UL - __CLZ(dev_cfg->prescaler)),
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#else
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(RTCC_CntPresc_TypeDef)CMU_DivToLog2(dev_cfg->prescaler),
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#endif
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rtccCntTickPresc, /* Count according to prescaler value */
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#if defined(_RTCC_CTRL_BUMODETSEN_MASK)
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false, /* Don't store RTCC counter value in
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* RTCC_CCV2 upon backup mode entry.
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*/
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#endif
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#if defined(_RTCC_CTRL_OSCFDETEN_MASK)
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false, /* Don't enable LFXO fail detection */
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#endif
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#if defined (_RTCC_CTRL_CNTMODE_MASK)
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rtccCntModeNormal, /* Use RTCC in normal mode */
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#endif
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#if defined (_RTCC_CTRL_LYEARCORRDIS_MASK)
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false /* No leap year correction. */
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#endif
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};
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RTCC_CCChConf_TypeDef rtcc_channel_config = {
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rtccCapComChModeCompare, /* Use compare mode */
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rtccCompMatchOutActionPulse,/* Don't care */
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rtccPRSCh0, /* PRS is not used */
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rtccInEdgeNone, /* Capture input is not used */
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rtccCompBaseCnt, /* Compare with base CNT register */
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#if defined (_RTCC_CC_CTRL_COMPMASK_MASK)
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0, /* Compare mask */
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#endif
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#if defined (_RTCC_CC_CTRL_DAYCC_MASK)
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rtccDayCompareModeMonth, /* Don't care */
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#endif
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};
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#if defined(cmuClock_CORELE)
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/* Ensure LE modules are clocked. */
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CMU_ClockEnable(cmuClock_CORELE, true);
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#endif
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#if defined(CMU_LFECLKEN0_RTCC)
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/* Enable LFECLK in CMU (will also enable oscillator if not enabled). */
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CMU_ClockSelectSet(cmuClock_LFE, cmuSelect_LFXO);
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#elif defined(_SILICON_LABS_32B_SERIES_2)
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CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFXO);
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#else
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/* Enable LFACLK in CMU (will also enable oscillator if not enabled). */
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CMU_ClockSelectSet(cmuClock_LFA, cmuSelect_LFXO);
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#endif
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/* Enable RTCC module clock */
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CMU_ClockEnable(cmuClock_RTCC, true);
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/* Initialize RTCC */
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RTCC_Init(&rtcc_config);
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/* Set up compare channels */
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RTCC_ChannelInit(0, &rtcc_channel_config);
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RTCC_ChannelInit(1, &rtcc_channel_config);
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RTCC_ChannelInit(2, &rtcc_channel_config);
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/* Disable module's internal interrupt sources */
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RTCC_IntDisable(_RTCC_IF_MASK);
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RTCC_IntClear(_RTCC_IF_MASK);
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/* Clear the counter */
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RTCC->CNT = 0;
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/* Configure & enable module interrupts */
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dev_cfg->irq_config();
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LOG_INF("Device %s initialized", dev->name);
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return 0;
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}
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static const struct counter_driver_api counter_gecko_driver_api = {
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.start = counter_gecko_start,
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.stop = counter_gecko_stop,
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.get_value = counter_gecko_get_value,
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.set_alarm = counter_gecko_set_alarm,
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.cancel_alarm = counter_gecko_cancel_alarm,
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.set_top_value = counter_gecko_set_top_value,
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.get_pending_int = counter_gecko_get_pending_int,
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.get_top_value = counter_gecko_get_top_value,
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};
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/* RTCC0 */
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ISR_DIRECT_DECLARE(counter_gecko_isr_0)
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{
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const struct device *const dev = DEVICE_DT_INST_GET(0);
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struct counter_gecko_data *const dev_data = dev->data;
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counter_alarm_callback_t alarm_callback;
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uint32_t count = RTCC_CounterGet();
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uint32_t flags = RTCC_IntGetEnabled();
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RTCC_IntClear(flags);
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if (flags & RTCC_IF_CC1) {
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if (dev_data->top_callback) {
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dev_data->top_callback(dev, dev_data->top_user_data);
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}
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}
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for (int i = 0; i < RTCC_ALARM_NUM; i++) {
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uint8_t cc_idx = chan_id2cc_idx(i);
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if (flags & (RTCC_IF_CC0 << cc_idx)) {
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if (dev_data->alarm[i].callback) {
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alarm_callback = dev_data->alarm[i].callback;
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dev_data->alarm[i].callback = NULL;
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alarm_callback(dev, i, count,
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dev_data->alarm[i].user_data);
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}
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}
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}
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ISR_DIRECT_PM();
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return 1;
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}
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BUILD_ASSERT((DT_INST_PROP(0, prescaler) > 0U) &&
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(DT_INST_PROP(0, prescaler) <= 32768U));
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static void counter_gecko_0_irq_config(void)
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{
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IRQ_DIRECT_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority),
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counter_gecko_isr_0, 0);
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irq_enable(DT_INST_IRQN(0));
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}
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static const struct counter_gecko_config counter_gecko_0_config = {
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.info = {
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.max_top_value = RTCC_MAX_VALUE,
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.freq = DT_INST_PROP(0, clock_frequency) /
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DT_INST_PROP(0, prescaler),
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.flags = COUNTER_CONFIG_INFO_COUNT_UP,
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.channels = RTCC_ALARM_NUM,
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},
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.irq_config = counter_gecko_0_irq_config,
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.prescaler = DT_INST_PROP(0, prescaler),
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};
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static struct counter_gecko_data counter_gecko_0_data;
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DEVICE_DT_INST_DEFINE(0, counter_gecko_init, NULL,
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&counter_gecko_0_data, &counter_gecko_0_config,
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PRE_KERNEL_1, CONFIG_COUNTER_INIT_PRIORITY,
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&counter_gecko_driver_api);
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