114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
/*
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* Copyright (c) 2021 Google Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ite_it8xxx2_bbram
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#include <errno.h>
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#include <zephyr/drivers/bbram.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/sys/util.h>
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#ifndef CONFIG_BBRAM_IT8XXX2_EMUL
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#include <chip_chipregs.h>
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#else
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/* Emulation register values */
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enum bram_indices {
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BRAM_IDX_VALID_FLAGS0,
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BRAM_IDX_VALID_FLAGS1,
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BRAM_IDX_VALID_FLAGS2,
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BRAM_IDX_VALID_FLAGS3,
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};
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#endif
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#include "it8xxx2.h"
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LOG_MODULE_REGISTER(it8xxx2_bbram, CONFIG_BBRAM_LOG_LEVEL);
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#define BRAM_VALID_MAGIC 0x4252414D /* "BRAM" */
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#define BRAM_VALID_MAGIC_FIELD0 (BRAM_VALID_MAGIC & 0xff)
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#define BRAM_VALID_MAGIC_FIELD1 ((BRAM_VALID_MAGIC >> 8) & 0xff)
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#define BRAM_VALID_MAGIC_FIELD2 ((BRAM_VALID_MAGIC >> 16) & 0xff)
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#define BRAM_VALID_MAGIC_FIELD3 ((BRAM_VALID_MAGIC >> 24) & 0xff)
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static int bbram_it8xxx2_read(const struct device *dev, size_t offset, size_t size, uint8_t *data)
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{
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const struct bbram_it8xxx2_config *config = dev->config;
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if (size < 1 || offset + size > config->size) {
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return -EINVAL;
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}
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bytecpy(data, ((uint8_t *)config->base_addr + offset), size);
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return 0;
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}
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static int bbram_it8xxx2_write(const struct device *dev, size_t offset, size_t size,
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const uint8_t *data)
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{
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const struct bbram_it8xxx2_config *config = dev->config;
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if (size < 1 || offset + size > config->size) {
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return -EINVAL;
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}
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bytecpy(((uint8_t *)config->base_addr + offset), data, size);
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return 0;
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}
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static int bbram_it8xxx2_size(const struct device *dev, size_t *size)
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{
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const struct bbram_it8xxx2_config *config = dev->config;
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*size = config->size;
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return 0;
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}
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static const struct bbram_driver_api bbram_it8xxx2_driver_api = {
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.read = bbram_it8xxx2_read,
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.write = bbram_it8xxx2_write,
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.get_size = bbram_it8xxx2_size,
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};
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static int bbram_it8xxx2_init(const struct device *dev)
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{
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const struct bbram_it8xxx2_config *config = dev->config;
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uint8_t *base_addr = (uint8_t *)config->base_addr;
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uint8_t *bram_valid_flag0 = base_addr + BRAM_IDX_VALID_FLAGS0;
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uint8_t *bram_valid_flag1 = base_addr + BRAM_IDX_VALID_FLAGS1;
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uint8_t *bram_valid_flag2 = base_addr + BRAM_IDX_VALID_FLAGS2;
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uint8_t *bram_valid_flag3 = base_addr + BRAM_IDX_VALID_FLAGS3;
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int size = config->size;
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if ((*bram_valid_flag0 != BRAM_VALID_MAGIC_FIELD0) ||
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(*bram_valid_flag1 != BRAM_VALID_MAGIC_FIELD1) ||
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(*bram_valid_flag2 != BRAM_VALID_MAGIC_FIELD2) ||
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(*bram_valid_flag3 != BRAM_VALID_MAGIC_FIELD3)) {
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/*
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* Magic does not match, so BRAM must be uninitialized. Clear
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* entire Bank0 and Bank1 BRAM, and set magic value.
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*/
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for (int i = 0; i < size; i++) {
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*(base_addr + i) = 0;
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}
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*bram_valid_flag0 = BRAM_VALID_MAGIC_FIELD0;
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*bram_valid_flag1 = BRAM_VALID_MAGIC_FIELD1;
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*bram_valid_flag2 = BRAM_VALID_MAGIC_FIELD2;
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*bram_valid_flag3 = BRAM_VALID_MAGIC_FIELD3;
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}
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return 0;
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}
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#define BBRAM_INIT(inst) \
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BBRAM_IT8XXX2_DECL_CONFIG(inst); \
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DEVICE_DT_INST_DEFINE(inst, bbram_it8xxx2_init, NULL, NULL, &bbram_cfg_##inst, \
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PRE_KERNEL_1, CONFIG_BBRAM_INIT_PRIORITY, \
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&bbram_it8xxx2_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(BBRAM_INIT);
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