# ARC EM4 options # # Copyright (c) 2014 Wind River Systems, Inc. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # menu "ARC architecture" depends on ARC config ARCH default "arc" config ARCH_DEFCONFIG string default "arch/arc/defconfig" choice prompt "SoC Selection" source "arch/arc/soc/*/Kconfig.soc" endchoice menu "ARC EM4 processor options" config CPU_ARCEM4 bool default y select CPU_ARCV2 help This option signifies the use of an ARC EM4 CPU endmenu menu "ARCv2 Family Options" config CPU_ARCV2 bool default y select NANOKERNEL_TICKLESS_IDLE_SUPPORTED help This option signifies the use of a CPU of the ARCv2 family. config RAM_START prompt "RAM start address" hex config RAM_SIZE prompt "RAM size (in kB)" int config NSIM prompt "Running on the MetaWare nSIM simulator" bool default n help For running on nSIM simulator. a) Uses non-XIP to run in RAM. b) Linked at address 0x4000 with 0x4000 of RAM so that it works with a pc_size of 16 (default). c) Sets the entry point to __reset, since it seems nSIM ignores the reset vector when starting (??). config DATA_ENDIANNESS_LITTLE bool default y help This is driven by the processor implementation, since it is fixed in hardware. The BSP should set this value to 'n' if the data is implemented as big endian. config NUM_IRQ_PRIO_LEVELS int prompt "Number of supported interrupt priority levels" default 1 range 1 16 help Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1. The minimum value is 1. The BSP must provide a valid default for proper operation. config NUM_REGULAR_IRQ_PRIO_LEVELS int prompt "Number of supported regular interrupt priority levels" default 1 range 1 16 help This represents the number of Regular Interrupt priorities, which does NOT include the Fast (FIRQ) priority. The Regular Interrupt priorities available will be (NUM_IRQ_PRIO_LEVELS - NUM_REGULAR_IRQ_PRIO_LEVELS) to (NUM_REGULAR_IRQ_PRIO_LEVELS - 1). The maximum value is NUM_IRQ_PRIO_LEVELS. The BSP must provide a valid default for proper operation. config NUM_IRQS int prompt "Upper limit of interrupt numbers/IDs used" range 17 256 help Interrupts available will be 0 to NUM_IRQS-1. The minimum value is 17 as the first 16 entries in the vector table are for CPU exceptions. The BSP must provide a valid default. This drives the size of the vector table. config FIRQ_STACK_SIZE int prompt "Size of stack for FIRQs (in bytes)" depends on CPU_ARCV2 default 1024 help FIRQs and regular IRQs have different stacks so that a FIRQ can start running without doing stack switching in software. config FAULT_DUMP int prompt "Fault dump level" default 2 range 0 2 help Different levels for display information when a fault occurs. 2: The default. Display specific and verbose information. Consumes the most memory (long strings). 1: Display general and short information. Consumes less memory (short strings). 0: Off. config IRQ_OFFLOAD bool "Enable IRQ offload" default n help Enable irq_offload() API which allows functions to be synchronously run in interrupt context. Uses one entry in the IDT. Mainly useful for test cases. config XIP default n if NSIM default y config NSIM prompt "Running on the MetaWare nSIM simulator" bool default n help For running on nSIM simulator. a) Uses non-XIP to run in RAM. b) Linked at address 0x4000 with 0x4000 of RAM so that it works with a pc_size of 16 (default). c) Sets the entry point to __reset, since it seems nSIM ignores the reset vector when starting. config SW_ISR_TABLE bool prompt "Enable software interrupt handler table" default y help Enable an interrupt handler table implemented in software. This table, unlike ISRs connected directly in the vector table, allow a parameter to be passed to the interrupt handlers. Also, invoking the exeception/interrupt exit stub is automatically done. This has to be enabled for dynamically connecting interrupt handlers at runtime (SW_ISR_TABLE_DYNAMIC). config SW_ISR_TABLE_DYNAMIC bool prompt "Allow installing interrupt handlers at runtime" depends on SW_ISR_TABLE default n help This option enables irq_connect_dynamic(). It moves the ISR table to SRAM so that it is writable. This has the side-effect of removing write-protection on the ISR table. config SW_ISR_TABLE_STATIC_CUSTOM bool prompt "Projects provide a custom static software ISR table" depends on SW_ISR_TABLE && !SW_ISR_TABLE_DYNAMIC default n help Projects, not the BSP, provide a software table of ISR and their parameters. The table is static, and thus ISRs cannot be connected at runtime. config SW_ISR_TABLE_BSP bool # omit prompt to signify a "hidden" option depends on SW_ISR_TABLE_DYNAMIC || (SW_ISR_TABLE && !SW_ISR_TABLE_STATIC_CUSTOM) default y help Not user-selectable, helps build system logic. config IRQ_VECTOR_TABLE_CUSTOM bool prompt "Projects provide a custom static IRQ part of vector table" depends on !SW_ISR_TABLE default n help Projects, not the BSP, provide the IRQ part of the vector table. This is the table of interrupt handlers with the best potential performance, but is the less flexible. The ISRs are installed directly in the vector table, thus are directly called by the CPU when an interrupt is taken. This adds the least overhead when handling an interrupt. Downsides: - ISRs cannot have a parameter - ISRs cannot be connected at runtime - ISRs must notify the kernel manually by invoking _ExcExit() when then are about to return. config IRQ_VECTOR_TABLE_BSP bool # omit prompt to signify a "hidden" option depends on SW_ISR_TABLE || !IRQ_VECTOR_TABLE_CUSTOM default y help Not user-selectable, helps build system logic. config ARCH_HAS_TASK_ABORT bool # omit prompt to signify a "hidden" option default n config ARCH_HAS_NANO_FIBER_ABORT bool # omit prompt to signify a "hidden" option default n config ARC_ATOMIC_ASM bool default n depends on !CPU_ARCEM4 help Say y if the processor supports atomic assembly instructions: LLOCK and SCOND. Say n if not sure. Note that these instructions are not supported on ARC EM family processors. endmenu source "arch/arc/soc/*/Kconfig" endmenu