/* * Copyright 2020 Carlo Caione * * SPDX-License-Identifier: Apache-2.0 */ #ifndef ZEPHYR_DRIVERS_PSCI_PSCI_H_ #define ZEPHYR_DRIVERS_PSCI_PSCI_H_ #include #ifdef CONFIG_64BIT #define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name #else #define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN_##name #endif /* PSCI v0.2 interface */ #define PSCI_0_2_FN_BASE 0x84000000 #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) #define PSCI_0_2_64BIT 0x40000000 #define PSCI_0_2_FN64_BASE \ (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) /* PSCI return values (inclusive of all PSCI versions) */ #define PSCI_RET_SUCCESS 0 #define PSCI_RET_NOT_SUPPORTED -1 #define PSCI_RET_INVALID_PARAMS -2 #define PSCI_RET_DENIED -3 #define PSCI_RET_ALREADY_ON -4 #define PSCI_RET_ON_PENDING -5 #define PSCI_RET_INTERNAL_FAILURE -6 #define PSCI_RET_NOT_PRESENT -7 #define PSCI_RET_DISABLED -8 #define PSCI_RET_INVALID_ADDRESS -9 typedef unsigned long (psci_fn)(unsigned long, unsigned long, unsigned long, unsigned long); struct psci { enum arm_smccc_conduit conduit; psci_fn *invoke_psci_fn; uint32_t ver; }; #endif /* ZEPHYR_DRIVERS_PSCI_PSCI_H_ */