/*
 * Copyright 2024 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/ {
	soc {
		sram: sram@4000000 {
			ranges = <0x4000000 0x4000000 0x20000000>;
		};

		peripheral: peripheral@40000000 {
			ranges = <0x0 0x40000000 0x10000000>;
		};

		flexspi: spi@400c8000 {
			reg = <0x400c8000 0x1000>, <0x80000000 DT_SIZE_M(8)>;
		};
	};
};

#include "nxp_mcxn94x_common.dtsi"