/*
 * Copyright (c) 2021 metraTec GmbH
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/armv6-m.dtsi>
#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/i2c/i2c.h>
#include <mem.h>
#include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-m0+";
			reg = <0>;
		};
	};

	soc {
		syscon: syscon@40000000 {
			compatible = "nxp,lpc-syscon";
			reg = <0x40000000 0x4000>;
			#clock-cells = <1>;
			reset: reset {
				compatible = "nxp,lpc-syscon-reset";
				#reset-cells = <1>;
			};
		};

		sram0:memory@20000000 {
			compatible = "mmio-sram";
			reg = <0x20000000 DT_SIZE_K(64)>;
		};

		sramx:memory@4000000 {
			compatible = "mmio-sram";
			reg = <0x04000000 DT_SIZE_K(32)>;
		};

		flash0: flash@0 {
			compatible = "soc-nv-flash";
			reg = <0 DT_SIZE_K(256)>;
		};

		iocon: iocon@40001000 {
			compatible = "nxp,lpc-iocon";
			reg = <0x40001000 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x40001000 0x100>;
			pinctrl: pinctrl {
				compatible = "nxp,lpc-iocon-pinctrl";
			};
		};

		gpio: gpio@4008c000 {
			compatible = "nxp,lpc-gpio";
			reg = <0x4008c000 0x2484>;
			#address-cells = <1>;
			#size-cells = <0>;

			gpio0: gpio@0 {
				compatible = "nxp,lpc-gpio-port";
				int-source = "pint";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0>;
			};

			gpio1: gpio@1 {
				compatible = "nxp,lpc-gpio-port";
				int-source = "pint";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <1>;
			};
		};

		pint: pint@40004000 {
			compatible = "nxp,pint";
			reg = <0x40004000 0x1000>;
			interrupt-controller;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			interrupts = <4 2>, <5 2>, <6 2>, <7 2>;
			num-lines = <4>;
			num-inputs = <64>;
		};

		flexcomm0: flexcomm@40086000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40086000 0x1000>;
			interrupts = <14 0>;
			clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 11)>;
			status = "disabled";
		};

		flexcomm1: flexcomm@40087000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40087000 0x1000>;
			interrupts = <15 0>;
			clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 12)>;
			status = "disabled";
		};

		flexcomm2: flexcomm@40088000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40088000 0x1000>;
			interrupts = <16 0>;
			clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 13)>;
			status = "disabled";
		};

		flexcomm3: flexcomm@40089000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40089000 0x1000>;
			interrupts = <17 0>;
			clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 14)>;
			status = "disabled";
		};

		flexcomm4: flexcomm@4008a000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x4008a000 0x1000>;
			interrupts = <18 0>;
			clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 15)>;
			status = "disabled";
		};

		flexcomm5: flexcomm@40096000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40096000 0x1000>;
			interrupts = <19 0>;
			clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 16)>;
			status = "disabled";
		};

		flexcomm6: flexcomm@40097000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40097000 0x1000>;
			interrupts = <20 0>;
			clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 17)>;
			status = "disabled";
		};

		flexcomm7: flexcomm@40098000 {
			compatible = "nxp,lpc-flexcomm";
			reg = <0x40098000 0x1000>;
			interrupts = <21 0>;
			clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
			resets = <&reset NXP_SYSCON_RESET(1, 18)>;
			status = "disabled";
		};

		sc_timer: pwm@40085000 {
			compatible = "nxp,sctimer-pwm";
			reg = <0x40085000 0x1000>;
			status = "disabled";
			interrupts = <12 0>;
			clocks = <&syscon MCUX_SCTIMER_CLK>;
			prescaler = <1>;
			#pwm-cells = <3>;
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <2>;
};