/* * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. * SPDX-License-Identifier: Apache-2.0 */ #include #include #include #include #include "memory.h" /* User available SRAM memory segments */ appcpu_iram_end = USER_IRAM_END; appcpu_dram_end = USER_DRAM_END; appcpu_iram_org = appcpu_iram_end - APPCPU_SRAM_SIZE; appcpu_dram_org = appcpu_dram_end - APPCPU_SRAM_SIZE; appcpu_iram_len = APPCPU_SRAM_SIZE; appcpu_dram_len = APPCPU_SRAM_SIZE; /* Aliases */ #define ROMABLE_REGION FLASH #define RODATA_REGION dram0_1_seg /* drom0_1_seg */ #define RAMABLE_REGION dram0_1_seg #define IRAM_REGION iram0_1_seg /* Zephyr macro re-definitions */ #undef GROUP_DATA_LINK_IN #define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion #undef GROUP_NOLOAD_LINK_IN #define GROUP_NOLOAD_LINK_IN(vregion, lregion) > vregion /* Flash segments (rodata and text) should be mapped in the virtual address spaces. * Executing directly from LMA is not possible. */ #undef GROUP_ROM_LINK_IN #define GROUP_ROM_LINK_IN(vregion, lregion) > RODATA_REGION AT > lregion /* Make sure new sections have consistent alignment between input and output sections */ #undef SECTION_DATA_PROLOGUE #define SECTION_DATA_PROLOGUE(name, options, align) name options : ALIGN_WITH_INPUT #undef SECTION_PROLOGUE #define SECTION_PROLOGUE SECTION_DATA_PROLOGUE MEMORY { #ifdef CONFIG_BOOTLOADER_MCUBOOT mcuboot_hdr (R): org = 0x0, len = 0x20 metadata (R): org = 0x20, len = 0x20 FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40 #else /* Make safety margin in the FLASH memory size so the * (esp_img_header + (n*esp_seg_headers)) would fit */ FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100 #endif /* CONFIG_BOOTLOADER_MCUBOOT */ iram0_1_seg(RX): org = appcpu_iram_org, len = appcpu_iram_len dram0_1_seg(RW): org = appcpu_dram_org, len = appcpu_dram_len #ifdef CONFIG_GEN_ISR_TABLES IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000 #endif } /* Default entry point: */ ENTRY(__appcpu_start) /* Used as a pointer to the heap end */ _heap_sentry = DRAM_RESERVED_START; SECTIONS { #if defined(CONFIG_BOOTLOADER_MCUBOOT) /* Reserve space for MCUboot header in the binary */ .mcuboot_header : { QUAD(0x0) QUAD(0x0) QUAD(0x0) QUAD(0x0) } > mcuboot_hdr /* Image load table */ .metadata : { /* 0. Magic byte for load header */ LONG(0xace637d3) /* 1. Application entry point address */ KEEP(*(.entry_addr)) /* IRAM metadata: * 2. Destination address (VMA) for IRAM region * 3. Flash offset (LMA) for start of IRAM region * 4. Size of IRAM region */ LONG(ADDR(.iram0.vectors)) LONG(LOADADDR(.iram0.vectors)) LONG(_iram_end - _init_start); /* DRAM metadata: * 5. Destination address (VMA) for DRAM region * 6. Flash offset (LMA) for start of DRAM region * 7. Size of DRAM region */ LONG(ADDR(.dram0.data)) LONG(LOADADDR(.dram0.data)) LONG(_data_end - _data_start) } > metadata #endif /* CONFIG_BOOTLOADER_MCUBOOT */ #include #ifdef CONFIG_LLEXT #include #endif /* --- START OF IRAM --- */ /* Send .iram0 code to iram */ .iram0.vectors : ALIGN(4) { _iram_start = ABSOLUTE(.); /* Vectors go to IRAM */ _init_start = ABSOLUTE(.); /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ . = 0x0; KEEP(*(.WindowVectors.text)); . = 0x180; KEEP(*(.Level2InterruptVector.text)); . = 0x1c0; KEEP(*(.Level3InterruptVector.text)); . = 0x200; KEEP(*(.Level4InterruptVector.text)); . = 0x240; KEEP(*(.Level5InterruptVector.text)); . = 0x280; KEEP(*(.DebugExceptionVector.text)); . = 0x2c0; KEEP(*(.NMIExceptionVector.text)); . = 0x300; KEEP(*(.KernelExceptionVector.text)); . = 0x340; KEEP(*(.UserExceptionVector.text)); . = 0x3C0; KEEP(*(.DoubleExceptionVector.text)); . = 0x400; _invalid_pc_placeholder = ABSOLUTE(.); *(.*Vector.literal) *(.UserEnter.literal); *(.UserEnter.text); . = ALIGN (16); *(.entry.text) *(.init.literal) *(.init) . = ALIGN (16); _init_end = ABSOLUTE(.); } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) .iram0.text : ALIGN(4) { _iram_text_start = ABSOLUTE(.); *(.iram1 .iram1.*) *(.iram0.literal .iram.literal .iram.text.literal .iram0.text .iram.text) *libesp32.a:panic.*(.literal .text .literal.* .text.*) *librtc.a:(.literal .text .literal.* .text.*) *libarch__xtensa__core.a:(.literal .text .literal.* .text.*) *libkernel.a:(.literal .text .literal.* .text.*) *libsoc.a:rtc_*.*(.literal .text .literal.* .text.*) *libsoc.a:cpu_util.*(.literal .text .literal.* .text.*) *libgcc.a:lib2funcs.*(.literal .text .literal.* .text.*) *libdrivers__flash.a:flash_esp32.*(.literal .text .literal.* .text.*) *libzephyr.a:windowspill_asm.*(.literal .text .literal.* .text.*) *libzephyr.a:log_noos.*(.literal .text .literal.* .text.*) *libdrivers__timer.a:xtensa_sys_timer.*(.literal .text .literal.* .text.*) *libzephyr.a:systimer_hal.*(.literal .text .literal.* .text.*) *libzephyr.a:log_core.*(.literal .text .literal.* .text.*) *libzephyr.a:cbprintf_complete.*(.literal .text .literal.* .text.*) *libzephyr.a:printk.*(.literal.printk .literal.vprintk .literal.char_out .text.printk .text.vprintk .text.char_out) *libzephyr.a:log_msg.*(.literal .text .literal.* .text.*) *libzephyr.a:log_list.*(.literal .text .literal.* .text.*) *libdrivers__console.a:uart_console.*(.literal.console_out .text.console_out) *libzephyr.a:log_output.*(.literal .text .literal.* .text.*) *libzephyr.a:log_backend_uart.*(.literal .text .literal.* .text.*) *libzephyr.a:loader.*(.literal .text .literal.* .text.*) *liblib__libc__minimal.a:string.*(.literal .text .literal.* .text.*) *liblib__libc__newlib.a:string.*(.literal .text .literal.* .text.*) *libc.a:*(.literal .text .literal.* .text.*) *libphy.a:(.phyiram .phyiram.*) *libgcov.a:(.literal .text .literal.* .text.*) . = ALIGN(16); } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) .flash.text : ALIGN(16) { _stext = .; _text_start = ABSOLUTE(.); *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ *(.fini.literal) *(.fini) *(.gnu.version) *(.literal .text .literal.* .text.*) /* CPU will try to prefetch up to 16 bytes of * of instructions. This means that any configuration (e.g. MMU, PMS) must allow * safe access to up to 16 bytes after the last real instruction, add * dummy bytes to ensure this */ . += 16; _text_end = ABSOLUTE(.); _etext = .; /* Similar to _iram_start, this symbol goes here so it is * resolved by addr2line in preference to the first symbol in * the flash.text segment. */ . = ALIGN(4); _flash_cache_start = ABSOLUTE(0); . = ALIGN(4); _iram_end = ABSOLUTE(.); } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) /* --- END OF IRAM --- */ /* --- START OF DRAM --- */ .dram0.dummy (NOLOAD): { . = ORIGIN(dram0_1_seg) + MAX(_iram_end, appcpu_iram_org) - appcpu_iram_org; . = ALIGN(16); } GROUP_LINK_IN(RAMABLE_REGION) .dram0.data : { . = ALIGN (8); __data_start = ABSOLUTE(.); _data_start = ABSOLUTE(.); *(.data) *(.data.*) *(.gnu.linkonce.d.*) *(.data1) *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) *(.sdata2) *(.sdata2.*) *(.gnu.linkonce.s2.*) /* rodata for panic handler(libarch__xtensa__core.a) and all * dependent functions should be placed in DRAM to avoid issue * when flash cache is disabled */ *libarch__xtensa__core.a:(.rodata .rodata.*) *libkernel.a:fatal.*(.rodata .rodata.*) *libkernel.a:init.*(.rodata .rodata.*) *libzephyr.a:cbprintf_complete*(.rodata .rodata.*) *libzephyr.a:systimer_hal.*(.rodata .rodata.*) *libzephyr.a:log_core.*(.rodata .rodata.*) *libzephyr.a:log_backend_uart.*(.rodata .rodata.*) *libzephyr.a:log_output.*(.rodata .rodata.*) *libzephyr.a:loader.*(.rodata .rodata.*) *libdrivers__serial.a:uart_esp32.*(.rodata .rodata.*) *libdrivers__flash.a:flash_esp32.*(.rodata .rodata.*) . = ALIGN(4); #include . = ALIGN(4); KEEP(*(.jcr)) *(.dram1 .dram1.*) . = ALIGN(16); } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) #include #include #include #include #include #include /* SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) */ .dram0.rodata : ALIGN(4) { _rodata_start = ABSOLUTE(.); *(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */ *(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */ __rodata_region_start = ABSOLUTE(.); . = ALIGN(4); #include . = ALIGN(4); *(EXCLUDE_FILE ( *libarch__xtensa__core.a:* *libkernel.a:fatal.* *libkernel.a:init.* *libzephyr.a:cbprintf_complete* *libzephyr.a:log_core.* *libzephyr.a:log_backend_uart.* *libzephyr.a:log_output.* *libzephyr.a:loader.* *libdrivers__serial.a:uart_esp32.*) .rodata) *(EXCLUDE_FILE ( *libarch__xtensa__core.a:* *libkernel.a:fatal.* *libkernel.a:init.* *libzephyr.a:cbprintf_complete* *libzephyr.a:log_core.* *libzephyr.a:log_backend_uart.* *libzephyr.a:log_output.* *libzephyr.a:loader.* *libdrivers__serial.a:uart_esp32.*) .rodata.*) . = ALIGN(4); *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ *(.gnu.linkonce.r.*) *(.rodata1) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table .gcc_except_table.*) *(.gnu.linkonce.e.*) *(.gnu.version_r) . = (. + 3) & ~ 3; __eh_frame = ABSOLUTE(.); KEEP(*(.eh_frame)) . = (. + 7) & ~ 3; /* C++ exception handlers table: */ __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); *(.xt_except_desc) *(.gnu.linkonce.h.*) __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); *(.xt_except_desc_end) *(.dynamic) *(.gnu.version_d) . = ALIGN(4); __rodata_region_end = ABSOLUTE(.); /* Literals are also RO data. */ _lit4_start = ABSOLUTE(.); *(*.lit4) *(.lit4.*) *(.gnu.linkonce.lit4.*) _lit4_end = ABSOLUTE(.); . = ALIGN(4); _thread_local_start = ABSOLUTE(.); *(.tdata) *(.tdata.*) *(.tbss) *(.tbss.*) *(.rodata_wlog) *(.rodata_wlog*) _thread_local_end = ABSOLUTE(.); _rodata_reserved_end = ABSOLUTE(.); . = ALIGN(4); } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) /* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA. * Executing directly from LMA is not possible. */ #pragma push_macro("GROUP_ROM_LINK_IN") #undef GROUP_ROM_LINK_IN #define GROUP_ROM_LINK_IN(vregion, lregion) > RAMABLE_REGION AT > lregion #include #include #include #include #include #include #include #include #include #include #pragma pop_macro("GROUP_ROM_LINK_IN") /* Create an explicit section at the end of all the data that shall be mapped into drom. * This is used to calculate the size of the _image_drom_size variable */ /* SECTION_PROLOGUE(_RODATA_SECTION_END,,) */ .dram0.rodata_end : ALIGN(0x10) { . = ALIGN(16); _image_rodata_end = ABSOLUTE(.); } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) .dram0.end : { __data_end = ABSOLUTE(.); _data_end = ABSOLUTE(.); } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) .dram0.noinit (NOLOAD): { . = ALIGN(8); *(.noinit) *(.noinit.*) . = ALIGN(8) ; } GROUP_LINK_IN(RAMABLE_REGION) /* Shared RAM */ .dram0.bss (NOLOAD) : { . = ALIGN (8); _bss_start = ABSOLUTE(.); /* required by bluetooth library */ __bss_start = ABSOLUTE(.); *(.dynsbss) *(.sbss) *(.sbss.*) *(.gnu.linkonce.sb.*) *(.scommon) *(.sbss2) *(.sbss2.*) *(.gnu.linkonce.sb2.*) *(.dynbss) *(.bss) *(.bss.*) *(.share.mem) *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN (8); __bss_end = ABSOLUTE(.); } GROUP_LINK_IN(RAMABLE_REGION) /* Provide total SRAM usage, including IRAM and DRAM */ _image_ram_start = _iram_start - IRAM_DRAM_OFFSET; #include ASSERT(((__bss_end - ORIGIN(dram0_1_seg)) <= LENGTH(dram0_1_seg)), "DRAM segment data does not fit.") /* --- END OF DRAM --- */ /* --- START OF IROM --- */ /* --- END OF IROM --- */ /* --- START OF DROM --- */ /* --- END OF DROM --- */ #ifdef CONFIG_GEN_ISR_TABLES #include #endif #include .xtensa.info 0 : { *(.xtensa.info) } .xt.insn 0 : { KEEP (*(.xt.insn)) KEEP (*(.gnu.linkonce.x.*)) } .xt.prop 0 : { KEEP (*(.xt.prop)) KEEP (*(.xt.prop.*)) KEEP (*(.gnu.linkonce.prop.*)) } .xt.lit 0 : { KEEP (*(.xt.lit)) KEEP (*(.xt.lit.*)) KEEP (*(.gnu.linkonce.p.*)) } .xt.profile_range 0 : { KEEP (*(.xt.profile_range)) KEEP (*(.gnu.linkonce.profile_range.*)) } .xt.profile_ranges 0 : { KEEP (*(.xt.profile_ranges)) KEEP (*(.gnu.linkonce.xt.profile_ranges.*)) } .xt.profile_files 0 : { KEEP (*(.xt.profile_files)) KEEP (*(.gnu.linkonce.xt.profile_files.*)) } } ASSERT(((_iram_end - ORIGIN(iram0_1_seg)) <= LENGTH(iram0_1_seg)), "IRAM0 segment data does not fit.")