/*
 * Copyright (c) 2021 Telink Semiconductor
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pinctrl/b91-pinctrl.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu0: cpu@0 {
			reg = <0>;
			clock-frequency = <24000000>;
			compatible ="telink,b91", "riscv";
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "telink,telink_b91-soc";
		ranges;

		ram_ilm: memory@0 {
			compatible = "mmio-sram";
		};

		ram_dlm: memory@80000 {
			compatible = "mmio-sram";
		};

		flash_mspi: flash-controller@80140100 {
			compatible = "telink,b91-flash-controller";
			label = "flash_mspi";
			reg = <0x80140100 0x40>;

			#address-cells = <1>;
			#size-cells = <1>;

			flash: flash@20000000 {
				compatible = "soc-nv-flash";
				write-block-size = <1>;
			};
		};

		power: power@80140180 {
			compatible = "telink,b91-power";
			reg = <0x80140180 0x40>;
			power-mode = "LDO_1P4_LDO_1P8";
			vbat-type = "VBAT_MAX_VALUE_GREATER_THAN_3V6";
			status = "okay";
		};

		gpioa: gpio@80140300 {
			compatible = "telink,b91-gpio";
			gpio-controller;
			interrupt-parent = <&plic0>;
			interrupts = <25 1>, <26 1>, <27 1>;
			reg = <0x80140300 0x08>;
			label = "gpio_a";
			status = "disabled";
			#gpio-cells = <2>;
		};

		gpiob: gpio@80140308 {
			compatible = "telink,b91-gpio";
			gpio-controller;
			interrupt-parent = <&plic0>;
			interrupts = <25 1>, <26 1>, <27 1>;
			reg = <0x80140308 0x08>;
			label = "gpio_b";
			status = "disabled";
			#gpio-cells = <2>;
		};

		gpioc: gpio@80140310 {
			compatible = "telink,b91-gpio";
			gpio-controller;
			interrupt-parent = <&plic0>;
			interrupts = <25 1>, <26 1>, <27 1>;
			reg = <0x80140310 0x08>;
			label = "gpio_c";
			status = "disabled";
			#gpio-cells = <2>;
		};

		gpiod: gpio@80140318 {
			compatible = "telink,b91-gpio";
			gpio-controller;
			interrupt-parent = <&plic0>;
			interrupts = <25 1>, <26 1>, <27 1>;
			reg = <0x80140318 0x08>;
			label = "gpio_d";
			status = "disabled";
			#gpio-cells = <2>;
		};

		gpioe: gpio@80140320 {
			compatible = "telink,b91-gpio";
			gpio-controller;
			interrupt-parent = <&plic0>;
			interrupts = <25 1>, <26 1>, <27 1>;
			reg = <0x80140320 0x08>;
			label = "gpio_e";
			status = "disabled";
			#gpio-cells = <2>;
		};

		plic0: interrupt-controller@e4000000 {
			compatible = "sifive,plic-1.0.0";
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = < 0xe4000000 0x00001000
					0xe4002000 0x00000800
					0xe4200000 0x00010000 >;
			reg-names = "prio", "irq_en", "reg";
			riscv,max-priority = <3>;
			riscv,ndev = <63>;
		};

		uart0: serial@80140080 {
			compatible = "telink,b91-uart";
			label = "uart_0";
			reg = <0x80140080 0x40>;
			interrupts = <19 1>;
			interrupt-parent = <&plic0>;
			status = "disabled";
		};

		uart1: serial@801400C0 {
			compatible = "telink,b91-uart";
			label = "uart_1";
			reg = <0x801400C0 0x40>;
			interrupts = <18 1>;
			interrupt-parent = <&plic0>;
			status = "disabled";
		};

		ieee802154: ieee802154@80140800 {
			compatible = "telink,b91-zb";
			reg = <0x80140800 0x800>;
			label = "IEEE802154";
			interrupt-parent = <&plic0>;
			interrupts = <15 2>;
			status = "disabled";
		};

		pinmux: pinmux@80140330 {
			compatible = "telink,b91-pinmux";
			reg = <0x80140330 0x28
				   0x80140306 0x28
				   0x0000000e 0x0C>;
			reg-names = "pin_mux",
						"gpio_en",
						"pull_up_en";
			label = "pinmux";
			status = "disabled";

			/* Define UART0 pins: TX(PA3 PB2 PD2), RX(PA4 PB3 PD3) */

			uart0_tx_pa3: uart0_tx_pa3 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_3)>;
			};
			uart0_tx_pb2: uart0_tx_pb2 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_2)>;
			};
			uart0_tx_pd2: uart0_tx_pd2 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_2)>;
			};

			uart0_rx_pa4: uart0_rx_pa4 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_4)>;
			};
			uart0_rx_pb3: uart0_rx_pb3 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_3)>;
			};
			uart0_rx_pd3: uart0_rx_pd3 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_3)>;
			};

			/* Define UART1 pins: TX(PC6 PD6 PE0), RX(PC7 PD7 PE2) */

			uart1_tx_pc6: uart1_tx_pc6 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_6)>;
			};
			uart1_tx_pd6: uart1_tx_pd6 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_6)>;
			};
			uart1_tx_pe0: uart1_tx_pe0 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_0)>;
			};

			uart1_rx_pc7: uart1_rx_pc7 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_7)>;
			};
			uart1_rx_pd7: uart1_rx_pd7 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_7)>;
			};
			uart1_rx_pe2: uart1_rx_pe2 {
				pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_2)>;
			};
		};
	};
};