/dts-v1/;

#include <arm/armv7-m.dtsi>
#include "arm/mps2/soc_irq.h"

/ {
	compatible = "arm,mps2";
	#address-cells = <1>;
	#size-cells = <1>;

	chosen {
		zephyr,console = &uart0;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
	};

	cpus {
		cpu@0 {
			compatible = "arm,cortex-m3";
		};
	};

	sram0: memory {
		compatible = "sram";
		reg = <0x20000000 0x400000>;
	};

	flash0: flash {
		reg = <0 0x400000>;
	};

	soc {
		timer0: timer@40000000 {
			compatible = "arm,cmsdk-timer";
			reg = <0x40000000 0x1000>;
			interrupts = <IRQ_TIMER_0 3>;
		};

		timer1: timer@40001000 {
			compatible = "arm,cmsdk-timer";
			reg = <0x40001000 0x1000>;
			interrupts = <IRQ_TIMER_1 3>;
		};

		dtimer0: dtimer@40002000 {
			compatible = "arm,cmsdk-dtimer";
			reg = <0x40000000 0x1000>;
			interrupts = <IRQ_DUAL_TIMER 3>;
		};

		uart0: uart@40004000 {
			compatible = "arm,cmsdk-uart";
			reg = <0x40004000 0x1000>;
			interrupts = <IRQ_UART_0_TX 3 IRQ_UART_0_RX 3>;
			current-speed = <115200>;
		};

		uart1: uart@40005000 {
			compatible = "arm,cmsdk-uart";
			reg = <0x40005000 0x1000>;
			interrupts = <IRQ_UART_1_TX 3 IRQ_UART_1_RX 3>;
			current-speed = <115200>;
		};

		uart2: uart@40006000 {
			compatible = "arm,cmsdk-uart";
			reg = <0x40006000 0x1000>;
			interrupts = <IRQ_UART_2_TX 3 IRQ_UART_2_RX 3>;
			current-speed = <115200>;
		};

		uart3: uart@40007000 {
			compatible = "arm,cmsdk-uart";
			reg = <0x40007000 0x1000>;
			interrupts = <IRQ_UART_3_TX 3 IRQ_UART_3_RX 3>;
			current-speed = <115200>;
		};

		wdog0: wdog@40008000 {
			compatible = "arm,cmsdk-watchdog";
			reg = <0x40008000 0x1000>;
		};

		uart4: uart@40009000 {
			compatible = "arm,cmsdk-uart";
			reg = <0x40009000 0x1000>;
			interrupts = <IRQ_UART_4_TX 3 IRQ_UART_4_RX 3>;
			current-speed = <115200>;
		};

		gpio0: gpio@40010000 {
			compatible = "arm,cmsdk-gpio";
			reg = <0x40010000 0x1000>;
			interrupts = <IRQ_GPIO_0_COMBINED 3>;
		};

		gpio1: gpio@40011000 {
			compatible = "arm,cmsdk-gpio";
			reg = <0x40011000 0x1000>;
			interrupts = <IRQ_GPIO_1_COMBINED 3>;
		};

		gpio2: gpio@40012000 {
			compatible = "arm,cmsdk-gpio";
			reg = <0x40012000 0x1000>;
			interrupts = <IRQ_GPIO_2_COMBINED 3>;
		};

		gpio3: gpio@40013000 {
			compatible = "arm,cmsdk-gpio";
			reg = <0x40013000 0x1000>;
			interrupts = <IRQ_GPIO_3_COMBINED 3>;
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <3>;
};