/* * Copyright (c) 2016-2017 Jean-Paul Etienne * * SPDX-License-Identifier: Apache-2.0 */ /** * @file * @brief Linker command/script file * * Generic Linker script for the riscv32 platform */ #define _LINKER #define _ASMLANGUAGE #include #include #include #include #include #ifdef CONFIG_XIP #define ROMABLE_REGION ROM #else #define ROMABLE_REGION RAM #endif #define RAMABLE_REGION RAM #define _VECTOR_SECTION_NAME vector #define _EXCEPTION_SECTION_NAME exceptions #define _RESET_SECTION_NAME reset MEMORY { ROM (rx) : ORIGIN = CONFIG_RISCV_ROM_BASE_ADDR, LENGTH = CONFIG_RISCV_ROM_SIZE RAM (rwx) : ORIGIN = CONFIG_RISCV_RAM_BASE_ADDR, LENGTH = RISCV_RAM_SIZE /* Used by and documented in include/linker/intlist.ld */ IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K } SECTIONS { GROUP_START(ROM) _image_rom_start = .; SECTION_PROLOGUE(_VECTOR_SECTION_NAME,,) { . = ALIGN(4); KEEP(*(.vectors.*)) } GROUP_LINK_IN(ROM) GROUP_END(ROM) GROUP_START(ROMABLE_REGION) SECTION_PROLOGUE(_RESET_SECTION_NAME,,) { KEEP(*(.reset.*)) } GROUP_LINK_IN(ROMABLE_REGION) SECTION_PROLOGUE(_EXCEPTION_SECTION_NAME,,) { KEEP(*(".exception.entry.*")) *(".exception.other.*") } GROUP_LINK_IN(ROMABLE_REGION) SECTION_PROLOGUE(_TEXT_SECTION_NAME,,) { . = ALIGN(4); #ifdef CONFIG_GEN_SW_ISR_TABLE KEEP(*(SW_ISR_TABLE)) #endif KEEP(*(.openocd_debug)) KEEP(*(".openocd_debug.*")) _image_text_start = .; *(.text) *(".text.*") *(.gnu.linkonce.t.*) } GROUP_LINK_IN(ROMABLE_REGION) _image_text_end = .; #include SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) { . = ALIGN(4); *(.rodata) *(".rodata.*") *(.gnu.linkonce.r.*) } GROUP_LINK_IN(ROMABLE_REGION) _image_rom_end = .; __data_rom_start = .; GROUP_END(ROMABLE_REGION) GROUP_START(RAMABLE_REGION) SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,) { . = ALIGN(4); _image_ram_start = .; __data_ram_start = .; *(.data) *(".data.*") *(.sdata .sdata.* .gnu.linkonce.s.*) *(.sdata2 .sdata2.* .gnu.linkonce.s2.*) } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) #include __data_ram_end = .; SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD),) { /* * For performance, BSS section is assumed to be 4 byte aligned and * a multiple of 4 bytes */ . = ALIGN(4); __bss_start = .; *(.sbss) *(".sbss.*") *(.bss) *(".bss.*") COMMON_SYMBOLS /* * As memory is cleared in words only, it is simpler to ensure the BSS * section ends on a 4 byte boundary. This wastes a maximum of 3 bytes. */ __bss_end = ALIGN(4); } GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION) SECTION_PROLOGUE(_NOINIT_SECTION_NAME,(NOLOAD),) { /* * This section is used for non-initialized objects that * will not be cleared during the boot process. */ *(.noinit) *(".noinit.*") } GROUP_LINK_IN(RAMABLE_REGION) _image_ram_end = .; _end = .; /* end of image */ #ifdef CONFIG_GEN_ISR_TABLES #include #endif GROUP_END(RAMABLE_REGION) }