# Atmel SAM I2S bus driver configuration options

# Copyright (c) 2017 Piotr Mienkowski
# SPDX-License-Identifier: Apache-2.0

menuconfig I2S_SAM_SSC
	bool "Atmel SAM MCU family I2S (SSC) Bus Driver"
	depends on SOC_FAMILY_SAM
	select DMA
	help
	  Enable Inter Sound (I2S) bus driver for Atmel SAM MCU family based on
	  Synchronous Serial Controller (SSC) module.

if I2S_SAM_SSC

config I2S_SAM_SSC_RX_BLOCK_COUNT
	int "RX queue length"
	default 4

config I2S_SAM_SSC_TX_BLOCK_COUNT
	int "TX queue length"
	default 4

config I2S_SAM_SSC_0_NAME
	string "I2S 0 device name"
	default "I2S_0"

config I2S_SAM_SSC_0_IRQ_PRI
	int "Interrupt priority"
	default 0

config I2S_SAM_SSC_DMA_NAME
	string "DMA device name"
	default "DMA_0"
	help
	  Name of the DMA device this device driver can use.

config I2S_SAM_SSC_0_DMA_RX_CHANNEL
	int "DMA RX channel"
	help
	  DMA channel number to use for RX transfers.

config I2S_SAM_SSC_0_DMA_TX_CHANNEL
	int "DMA TX channel"
	help
	  DMA channel number to use for TX transfers.

choice I2S_SAM_SSC_0_PIN_TD_SELECT
	prompt "TD pin"
	depends on SOC_SERIES_SAME70 || \
		   SOC_SERIES_SAMV71

	config I2S_SAM_SSC_0_PIN_TD_PB5
		bool "PB5"

	config I2S_SAM_SSC_0_PIN_TD_PD10
		bool "PD10"

	config I2S_SAM_SSC_0_PIN_TD_PD26
		bool "PD26"

endchoice # I2S_SAM_SSC_0_PIN_TD_SELECT

config I2S_SAM_SSC_0_PIN_RF_EN
	bool "RF pin enabled"
	default y
	help
	  If enabled RF signal is connected to RF pin. It will be configured as
	  an output or an input depending on whether the receiver is working
	  in master or slave mode.

	  If disabled RF signal is disconnected from RF pin and connected
	  internally to TF (Transmitter Frame Synchro signal).

config I2S_SAM_SSC_0_PIN_RK_EN
	bool "RK pin enabled"
	default y
	help
	  If enabled RK signal is connected to RK pin. It will be configured as
	  an output or an input depending on whether the receiver is working
	  in master or slave mode.

	  If disabled RK signal is disconnected from RK pin and connected
	  internally to TK (Transmitter Clock signal).

endif # I2S_SAM_SSC