/* * Copyright (c) 2017 I-SENSE group of ICCS * * SPDX-License-Identifier: Apache-2.0 */ #include / { soc { i2c2: i2c@40005800 { compatible = "st,stm32-i2c-v2"; clock-frequency = ; #address-cells = <1>; #size-cells = <0>; reg = <0x40005800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; interrupts = <33 0>, <34 0>; interrupt-names = "event", "error"; status = "disabled"; label= "I2C_2"; }; spi2: spi@40003800 { compatible = "st,stm32-spi-fifo"; #address-cells = <1>; #size-cells = <0>; reg = <0x40003800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; interrupts = <36 5>; status = "disabled"; label = "SPI_2"; }; pinctrl: pin-controller@48000000 { gpioe: gpio@48001000 { compatible = "st,stm32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x48001000 0x400>; clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00200000>; label = "GPIOE"; }; }; timers1: timers@40012c00 { compatible = "st,stm32-timers"; reg = <0x40012c00 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000800>; status = "disabled"; label = "TIMERS_1"; pwm { compatible = "st,stm32-pwm"; status = "disabled"; st,prescaler = <10000>; label = "PWM_1"; }; }; timers4: timers@40000800 { compatible = "st,stm32-timers"; reg = <0x40000800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>; status = "disabled"; label = "TIMERS_4"; pwm { compatible = "st,stm32-pwm"; status = "disabled"; st,prescaler = <10000>; label = "PWM_4"; }; }; timers8: timers@40013400 { compatible = "st,stm32-timers"; reg = <0x40013400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>; status = "disabled"; label = "TIMERS_8"; pwm { compatible = "st,stm32-pwm"; status = "disabled"; st,prescaler = <10000>; label = "PWM_8"; }; }; timers20: timers@40015000 { compatible = "st,stm32-timers"; reg = <0x40015000 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00100000>; status = "disabled"; label = "TIMERS_20"; pwm { compatible = "st,stm32-pwm"; status = "disabled"; st,prescaler = <10000>; label = "PWM_20"; }; }; }; };