/* * Copyright (c) 2019 Brett Witherspoon * * SPDX-License-Identifier: Apache-2.0 */ #include #include #include / { cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-m4"; reg = <0>; }; }; sram0: memory@20000000 { compatible = "mmio-sram"; }; /* VIMS RAM configurable in CCFG as GPRAM or cache for FLASH (default) */ sram1: memory@11000000 { compatible = "mmio-sram"; reg = <0x11000000 0x2000>; }; flash0: serial-flash@0 { compatible = "serial-flash"; }; sysclk: system-clock { compatible = "fixed-clock"; clock-frequency = <48000000>; #clock-cells = <0>; }; soc { pinmux: pinmux@40081000 { compatible = "ti,cc13xx-cc26xx-pinmux"; reg = <0x40081000 0x1000>; label = "PINMUX"; }; gpio0: gpio@40022000 { compatible = "ti,cc13xx-cc26xx-gpio"; reg = <0x40022000 0x400>; interrupts = <0 0>; status = "disabled"; label = "GPIO_0"; gpio-controller; #gpio-cells = <2>; }; trng: random@40028000 { compatible = "ti,cc13xx-cc26xx-trng"; reg = <0x40028000 0x2000>; interrupts = <33 0>; status = "disabled"; label = "TRNG"; }; uart0: uart@40001000 { compatible = "ti,cc13xx-cc26xx-uart"; reg = <0x40001000 0x1000>; interrupts = <5 0>; clocks = <&sysclk>; status = "disabled"; label = "UART_0"; }; uart1: uart@4000b000 { compatible = "ti,cc13xx-cc26xx-uart"; reg = <0x4000b000 0x1000>; interrupts = <36 0>; clocks = <&sysclk>; status = "disabled"; label = "UART_1"; }; i2c0: i2c@40002000 { compatible = "ti,cc13xx-cc26xx-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x40002000 0x1000>; interrupts = <1 0>; clock-frequency = ; status = "disabled"; label = "I2C_0"; }; spi0: spi@40000000 { compatible = "ti,cc13xx-cc26xx-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x40000000 0x1000>; interrupts = <7 0>; status = "disabled"; label = "SPI_0"; }; spi1: spi@40008000 { compatible = "ti,cc13xx-cc26xx-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x40008000 0x1000>; interrupts = <8 0>; status = "disabled"; label = "SPI_1"; }; }; }; &nvic { arm,num-irq-priority-bits = <3>; };