/*
 * Copyright (c) 2020 Teslabs Engineering S.L.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/h7/stm32h7.dtsi>

/ {
	/* system data RAM accessible over over AXI bus */
	sram0: memory@24000000 {
		compatible = "mmio-sram";
		reg = <0x24000000 DT_SIZE_K(512)>;
	};

	dtcm: memory@20000000 {
		compatible = "arm,dtcm";
		reg = <0x20000000 DT_SIZE_K(128)>;
	};
};