/*
 * Copyright (c) 2018 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <silabs/efr32fg1p.dtsi>

/ {
	sram0: memory@20000000 {
		reg = <0x20000000 DT_SIZE_K(32)>;
	};

	soc {
		compatible = "silabs,efr32fg1p133f256gm48", "silabs,efr32fg1p", "silabs,efr32", "simple-bus";

		flash-controller@400e0000 {
			flash0: flash@0 {
				reg = <0 DT_SIZE_K(256)>;
			};
		};
	};
};