#include #include #include #define INT_UARTA0 21 // UART0 Rx and Tx #define INT_UARTA1 22 // UART1 Rx and Tx #define INT_I2CA0 24 // I2C controller /* Note: Zephyr uses exception numbers, vs the IRQ #s used by the CC32XX SDK */ /* which are offset by 16: */ #define EXP_UARTA0 (INT_UARTA0 - 16) #define EXP_UARTA1 (INT_UARTA1 - 16) #define EXP_I2CA0 (INT_I2CA0 - 16) #define EXC_GPIOA0 0 /* (INT_GPIOA0 - 16) = (16-16) */ #define EXC_GPIOA1 1 /* (INT_GPIOA1 - 16) = (17-16) */ #define EXC_GPIOA2 2 /* (INT_GPIOA2 - 16) = (18-16) */ #define EXC_GPIOA3 3 /* (INT_GPIOA3 - 16) = (19-16) */ / { cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-m4"; reg = <0>; }; }; sram0: memory@20000000 { device_type = "memory"; compatible = "mmio-sram"; }; flash0: serial-flash@0 { compatible = "serial-flash"; }; soc { uart0: uart@4000C000 { compatible = "ti,cc32xx-uart"; reg = <0x4000C000 0x4c>; interrupts = ; status = "disabled"; label = "UART_0"; }; uart1: uart@4000D000 { compatible = "ti,cc32xx-uart"; reg = <0x4000D000 0x4c>; interrupts = ; status = "disabled"; label = "UART_1"; }; i2c0: i2c@40020000 { compatible = "ti,cc32xx-i2c"; clock-frequency = ; #address-cells = <1>; #size-cells = <0>; reg = <0x40020000 0xfc8>; interrupts = ; status = "disabled"; label= "I2C_0"; }; gpioa0: gpio@40004000 { compatible = "ti,cc32xx-gpio"; reg = <0x40004000 0x1000>; interrupts = <0 1>; label = "GPIO_A0"; gpio-controller; #gpio-cells = <2>; }; gpioa1: gpio@40005000 { compatible = "ti,cc32xx-gpio"; reg = <0x40005000 0x1000>; interrupts = <1 1>; label = "GPIO_A1"; gpio-controller; #gpio-cells = <2>; }; gpioa2: gpio@40006000 { compatible = "ti,cc32xx-gpio"; reg = <0x40006000 0x1000>; interrupts = <2 1>; label = "GPIO_A2"; gpio-controller; #gpio-cells = <2>; }; gpioa3: gpio@40007000 { compatible = "ti,cc32xx-gpio"; reg = <0x40007000 0x1000>; interrupts = <3 1>; label = "GPIO_A3"; gpio-controller; #gpio-cells = <2>; }; }; }; &nvic { arm,num-irq-priority-bits = <3>; };