/* * Copyright 2021 NXP * * SPDX-License-Identifier: Apache-2.0 */ #include #include #include static const struct arm_mmu_region mmu_regions[] = { MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0), DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0), MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE), MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1), DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1), MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE), }; const struct arm_mmu_config mmu_config = { .num_regions = ARRAY_SIZE(mmu_regions), .mmu_regions = mmu_regions, };