/*
 * Copyright (c) 2017 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/f3/stm32f3.dtsi>
#include <zephyr/dt-bindings/adc/stm32l4_adc.h>

/ {
	soc {
		compatible = "st,stm32f334", "st,stm32f3", "simple-bus";

		timers1: timers@40012c00 {
			compatible = "st,stm32-timers";
			reg = <0x40012c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000800>;
			resets = <&rctl STM32_RESET(APB2, 11U)>;
			interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
			interrupt-names = "brk", "up", "trgcom", "cc";
			st,prescaler = <0>;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				#pwm-cells = <3>;
			};
		};

		adc1: adc@50000000 {
			compatible = "st,stm32-adc";
			reg = <0x50000000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x10000000>;
			interrupts = <18 0>;
			status = "disabled";
			#io-channel-cells = <1>;
			resolutions = <STM32_ADC_RES(12, 0x00)
				       STM32_ADC_RES(10, 0x01)
				       STM32_ADC_RES(8, 0x02)
				       STM32_ADC_RES(6, 0x03)>;
			sampling-times = <2 3 5 8 20 62 182 602>;
			st,adc-sequencer = <FULLY_CONFIGURABLE>;
		};

		rtc@40002800 {
			bbram: backup_regs {
				compatible = "st,stm32-bbram";
				st,backup-regs = <5>;
				status = "disabled";
			};
		};
	};
};

/delete-node/ &usb;