After GPIO shim using NRFX has been implemented, old gpio_nrf5
shim is no longer needed.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
FE310 is the name of one SoC out of a range of products in the SiFive
Freedom line. The FE310 SoC port in Zephyr is compatible with all of
these products, so rename the SoC to SiFive Freedom
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Consistently use
config FOO
bool/int/hex/string "Prompt text"
instead of
config FOO
bool/int/hex/string
prompt "Prompt text"
(...and a bunch of other variations that e.g. swapped the order of the
type and the 'prompt', or put other properties between them).
The shorthand is fully equivalent to using 'prompt'. It saves lines and
avoids tricking people into thinking there is some semantic difference.
Most of the grunt work was done by a modified version of
https://unix.stackexchange.com/questions/26284/how-can-i-use-sed-to-replace-a-multi-line-string/26290#26290, but some
of the rarer variations had to be converted manually.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.
This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'
Piggyback a missing 'source "drivers/gpio/Kconfig.imx"'. This file
wasn't included anywhere previously.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Adds a driver for SX1509B I2C GPIO chip. This driver only supports the
basic GPIO features and does not currently implement the LED driver and
keypad matrix features.
Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
Add gpio mcux driver which can be used for lpcxpresso54114 and other lpc
socs. In this driver, CMSIS register access is made for GPIO.
Option for access by GPIO Pin is provided as of now.
Signed-off-by: Shiksha Patel <shiksha.patel@nxp.com>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The PIO cores on Altera Nios-II processors can be used
for GPIOs and each PIO core can be configured as Input only,
Output only or as Bidirectional port from the Qsys tool.
The present Nios-II softcpu image on the Zephyr only has the
support for Output only port and the PIOs[0:3] are wired to
LED[0:3] on the Altera MAX10 board.
Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
Adds a new gpio driver for the NXP i.MX family of SoCs. Read, write,
configure, and callback API functions are all implemented.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.
Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
It is envisaged that this will be used by SoC or board code to make
available fixed purpose memory-mapped i/o registers to the rest of the
system which normally expects to use GPIO devices, e.g. for driving chip
select lines, LEDs or reading button states.
As such, the driver code doesn't provide a kconfig based configuration
mechanism, instead SoC/board code can hard-wire the devices it wants
with something simple like:
GPIO_MMIO32_INIT(misc_reg1, "MISC1", 0x12345678, 0xffffffffu)
Then, for example, if bit N of the register at 0x12345678 is wired up as
an SPI device chip select line, the SPI driver could be configured to
use pin N of the "MISC1" GPIO driver and not need any other board
specific code.
Change-Id: Ib02fcbab73fcf9637e25834db060fb3108626f47
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
tested with blinky, button and disco apps
Change-Id: I4b520d4f3e42c97e4a723747ce4a6c67ca9f1d18
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
Now that we have a more generic mcux gpio driver that can be used across
multiple Kinetis SoCs, remove the specific k64 gpio driver.
Jira: ZEP-1394
Change-Id: I177f96a75e441b70c523e74e99f1b7a54eac6b0e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new mcux gpio driver that can be used for k64 and other Kinetis
SoCs. This driver uses mcux CMSIS register accesses to the GPIO and PORT
modules. Some of the logic from the k64 gpio driver was reused and
refactored (mainly flag parsing and callback handling).
Jira: ZEP-1394
Change-Id: If5e9390861c181ec555dce6569b14debb729526a
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/basic/blinky
- samples/basic/disco
- samples/basic/button
All 4 GPIO ports are supported.
Change-Id: If8599a23c1d56cfd678a6e2e5339f7e093c6061a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The driver is currently used only by the ARM Beetle platform.
Jira: ZEP-1245
Change-Id: I6611edd7486a3c6d82d66a9a96c5d4860dad1539
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
It's unused anywhere and unlikely to be in the future.
Change-Id: I57926e91da7d31ef6ddda4f86e6dac103dbfa176
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
No need to create new Kconfig that do exactly the same, just
reuse those from the main QMSI driver.
Change-Id: I965055f36845ac0464e4a383b0d05c3ae35c0015
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
GPIO drivers are now using new system log macros also updated the
Kconfig variable to be a level rather than a bool.
JIRA: ZEP-311
Change-Id: I9a49626d816080cb8081c2dd445bae31f5dbf409
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add QMSI 1.1 based GPIO sub-driver for sensor system.
Origin: Original
Change-Id: Ida5565a5911eb55651a11a4ac0b240c624f8e1ca
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Many sub-systems might require to set a callback on different pins.
Thus enabling it via changing the API.
It is also possible to retrieve private-data in the callback handler
using CONTAINER_OF() macro (include/misc/util.h).
Former API is still available, and is emulated through the new one.
Using both should not be a problem as it's using new API calls.
However, it's now better to start using the new API.
Change-Id: Id16594202905976cc524775d1cd3592b54a84514
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The driver implements a GPIO device interface for STM32 MCUs. Each SoC
must provide implementation of the follwoing calls:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(),
stm32_gpio_set(). Consult gpio_stm32.h header for details on semantics
of these calls.
The driver registers 5 devices, each corresponding to a single GPIO
port. The users can then access individual pins by using values
0-15.
Change-Id: Id236b5b75c9dd091018a50a7be3501c8591cd551
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
() Moves config options for each controllers into their own
Kconfig files. This keeps drivers/gpio/Kconfig from getting
too big.
() Options for each controller are moved under their own
submenus.
() Re-named the device names to standard as "GPIO_0", "GPIO_1",
etc.
() Adds the missing copyright to Kconfig.atmel_sam3.
Origin: refactored from existing file
Change-Id: I7c531b0109ca5a6840d3abd9daa6bc784f15233d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The DesignWare GPIO options should really depend on whether
GPIO_DW is enabled.
Change-Id: I98b2964d6a0afdac89dc66a78342076afa6feec5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Interrupt and callback function support is added to the K64F GPIO driver.
The implementation is based on the Designware GPIO driver (gpio-dw.*).
Change-Id: Id88d06f748400f8f822ca98e098cb44a53678c38
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
K64 pinmux support is created as a normal driver.
As opposed to the Galileo board, the pin configuration options are
defined by the MCU and are not board-specific. Separate
platform/board-specific configuration code uses the pinmux driver for
the default pin settings. For FRDM-K64F, only the Arduino pins (22 of a
possible 160) are set up.
Some of the I/O pins routed to the Arduino header are also configured as
JTAG/SWD signals by default and are used by the OpenSDAv2 debug
interface. Therefore, a PRESERVE_JTAG_IO_PINS config option was created
for the FRDM-K64 platform to prevent the default pin settings from
re-configuring these pins.
The K64 MCU separates pin configuration and control, implemented in the
pinmux driver, from GPIO. This results in some cross referencing
between the K64 GPIO driver and the K64 pinmux driver due to the
dependencies of one on the other.
This pinmux driver also uses the expanded pinmux function/mode parameter
size to describe pin configuration options with bit fields for the K64,
including up to 8 pin functions, plus interrupt, pullup/down, drive
strength, open-drain and slew rate.
The following GCC warnings in the K64 pinmux driver are prevented when not
compiling with 'no-optimization' (-O0):
warning: 'gpio_dev' may be used uninitialized in this function
[-Wmaybe-uninitialized]
Change-Id: Ie5031d18750143bf895883058b3cd55fd9989fd3
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
Basic driver support for the Freescale K64 GPIO module.
Note that only pin direction, read and write are supported.
Change-Id: I6587bb260197a00497be9ac991002e3dde54718d
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/gpio/Kconfig because 1) most of
the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig.
It also moves the interrupt priority definition from the driver's
Kconfig to the platform's Kconfig since it is a platform-specific
configuration.
Change-Id: Id00f7907fa55025011dabce6e282a9623be23831
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This adds support to the AON GPIO controller using the QMSI driver.
In order to enable it, the following configuration options must be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH TO LIBQMSI"
CONFIG_GPIO_QMSI=y
CONFIG_GPIO_QMSI_AON=y
Change-Id: I5a1a232d97741ad7fdbf40d8aea5a835e5b4e724
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
The PIO controllers on Atmel SAM3 family processors can be
used for GPIOs, so this is the driver.
Change-Id: I3d5712f3a0a71025b820ca1c08dd767ee1e136d8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Introduce the GPIO QMSI-based implementation. This is basically a
shim layer that implement's Zephyr's GPIO APIs on top of QMSI drivers.
This is an alternative driver that conflicts with the previous
GPIO_DW implementation. In order to enable it you must set:
- CONFIG_GPIO=n
- CONFIG_GPIO_QMSI=y
- CONFIG_GPIO_0=y
- CONFIG_QMSI_DRIVERS=y
- CONFIG_QMSI_INTALL_PATH="PATH_TO_QMSI"
Note that this driver currently only supports one controller instance,
GPIO_0. It is implemented this way due to a limitation from the current
version of QMSI. QMSI versions later than 1.0 doesn't have this
limitation.
Missing:
- support multiple controller instances (gpio_0, gpio_1, etc);
- enable level triggered interrupts in sync with system clock,
through setting INT_CLOCK_SYNC properly.
Change-Id: Ib61b153dae9741806a9a31d7dc1f82b96d000fbe
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Use a default priority to avoid Kconfig blocking when priority
is not set in SoC or Board.
Change-Id: I4edda47b955a7ee834f04dc40d0decbd8dee6305
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adds io/aux register support for IP configuration.
x86 and ARM configure IP through MMIO register access.
ARC architecture configure IP through io/aux register access.
Change-Id: I4d07b91af09d88b7eb6ac1aa02e875dcd626bd26
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This is currently valid for quark_se platform. It's used internally to
suspend and/or resume the gpio controller.
Change-Id: I5147568ba6b0450363566b5f9fd2e8aa7e41df49
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Put initialization priorities as device driver Kconfig
parameter.
Initialization priority value for each platform is defined
in the platform Kconfig file.
Drivers and platform code use SYS_DEFINE_DEVICE to add
and initialization function.
Change-Id: I2f4f3c7370dac02408a1b50a0a1bade8b427a282
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
That fixes a build error. Platfom's board.h have to provide such flags
if they enable dw gpio 1 controller.
Take the opportunity to provide the right isr to IRQ_CONNECT_STATIC.
Change-Id: I16900ea04f7f7c5d3c99b93a92b00c1f651494de
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such controller is found in legacy bridge on Intel's platforms. Such as
Poulsbo or Quark x1000.
Change-Id: I30f205f1e73aaa680092e92717fdacbb74046fa3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Allows to remove the both edges support from the DW GPIO driver.
Change-Id: I9e39cca320aeac5d10aafe7a83641917ad004fe6
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Daniel Leung