Setting EEPROM_STM32 with `default y` under `if SOC_FAMILY_STM32`
overrides `depends on SOC_SERIES_STM32L1X` in EEPROM_STM32
definition.
Then, if ever EEPROM is set in any file (as in
tests/drivers/build_all`), EEPROM_STM32 will be indeed set,
with potential issues on series where driver is not yet correctly
handled.
Fix this by removing EEPROM_STM32 definition in STM32 generic
file and set `default y` along with the `depends on` to keep
it effective.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 94bed60abe introduced separate
DT symbols for SPI and SPIM. Update dts_fixup.h for all nRF chips
to align with those changes.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Commit a8a85c21cf introduced separate
DT symbols for TWI and TWIM. Update dts_fixup.h for all nRF chips
to align with those changes.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Uses the generated device tree macros, DT_NXP_LPC_USART_USART_*, in the
mcux flexcomm driver and removes the now unused dts fixups from the
lpc54xxx and lpc55xxx socs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Renames the lpc usart shim driver to more accurately reflect the
flexcomm hardware IP and to prepare for instantiating it on an SoC
outside the LPC family.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
When CONFIG_SYS_POWER_DEEP_SLEEP_STATES is not set, we have an unused
function that causes a build failure.
Enclose that function in the #ifdef.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
RISCV_RV32M1_VECTOR_BASE_ADDR is unused after commit 34b0516466
("boards: riscv32: rv32m1_vega: enable MCUboot for ri5cy core") (it was
called RISCV32_RV32M1_BASE_ADDR then).
RISCV_RV32M1_VECTOR_SIZE is still used, but is always 0x100, so remove
it too.
These symbols were only defined in a Kconfig.defconfig file.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.
Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.
Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Enables the high-speed spi instance 8 on the lpcxpresso55s69 board.
Configures pinmuxes and clocks, and updates board documentation
accordingly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
As ISR stack size depends on application code, its best set
in the application's prj.conf file. Hence, remove it from
soc Kconfig files.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add device tree fixups for the NXP LPI2C bus timeout property to the
NXP i.MX RT and Kineties KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
USE_CODE_PARTITION is a bit vague as a symbol name ("use code partition
how?"). Rename it to USE_DT_CODE_PARTITION to make it clearer that it's
about devicetree.
This would break any third-party configuration files that set it, but
it'll generate an error since kconfig.py promotes warnings to errors, so
it's probably not a big deal.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Created MEC1501 deep and light sleep example for MCHP MEC1501.
Modifications were made to SoC, board, timer, and hello world
sample program. Power management split into SoC power
implementing the interface and device power for device specific
logic.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
We remove the custom fixed MPU region definition from ST
STM32 SoC definitions, as the common fixed MPU
region definition is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from ARM
- Beetle
- Musca_a
- Musca_b1
- MPS2 (an385 and an521)
SoC definitions, as the common fixed MPU region definition
is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from Silicon
Labs exx32 SoC definitions, as the common fixed MPU region
definition is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
For the NXP Kinetis SoCs with the NXP MPU regions, we keep
the confiruation of the fixed SoC MPU regions at each SoC
definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from NXP IMX
RT, Kinetis, and LPC SoC definitions, as the common fixed MPU
region definition is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from Atmel
SAM SoC definition, as the common fixed MPU region definition
is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We remove the custom fixed MPU region definition from Nordic
nRF SoC definition, as the common fixed MPU region definition
is now used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We move the configuration of the fixed MPU regions for ARM
Cortex-M SoCs in a common place under soc/arm/common/cortex-m,
instead of having this configuration present in each ARM SoC or
SoC Series definition. The rationale behind this is that for all
SoCs the fixed MPU regions configured at SoC definition are only
used for enforcing default Flash and SRAM access policies, and
currently, this is common to all ARM SoCs with MPU support.
We also simplify the Flash and SRAM MPU region definition,
aiming at using a single MPU region index to program each
of them.
We still support the possibility for ARM SoCs to opt-out and,
instead, define their own custom fixed MPU regions at SoC
definition. We do it using a Kconfig option, introduced
explicitly for this purpose.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Bool symbols implicitly default to 'n'.
A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.
Also replace some
config
prompt "foo"
bool/int
with the more common shorthand
config
bool/int "foo"
See the 'Style recommendations and shorthands' section in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
The type of SOC_ATMEL_SAME70_DISABLE_ERASE_PIN is bool, yet its default
is specified as an int value of 0.
This commit removes the implied `default 0`, which is equivalent to
`default n`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
In order to avoid a warning from Sphinx complaining that the
supported_features.rst file is not included in any ToC, rename it to
.txt so that Sphinx understands that this is only a snippet to be
included in other files.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The Newlib in the XCC toolchain for intel_s1000_crb has a few
missing functions which are reentrant versions of the one
defined in lib/libc/newlib/libc-hooks.c. So make these call
the correct functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Both HAS_I2C_DW and HAS_SPI_DW are not valid unless I2C and
SPI are both selected. So make them dependent on the parent
subsystem config.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This header contains encoding offsets for all the eSPI channels which
communicate data from/to the host.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Enable SWO debug output during system initialization and not as part of
GPIO driver initialization. After the modification the logger output
becomes available earlier during the boot process. Also, it's not
necessary anymore to build full GPIO driver only to enable SWO. This may
be critical when building small images.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
We need to fix the formato of the macros for nRF CACHE and NVMC
peripherals in soc.c, so the _S and _NS suffixes are skipped.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Since the nRF5340 DK contains the required DC/DC circuitry,
enable it by default while keeping it configurable. This
reduces power consumption in application core , network
core and high voltage use.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
in SMP, arc uses gfrc as wall clock, so it's ok
to enable SYSTEM_CLOCK_SLOPPY to avoid unnecessary
interrupts
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Add device tree elements for all gpio ports of the efr32mg12p including
the dts fixup entries.
Also remove gpio port e since this is not available in efr32mg12p socs.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
SoC initialization had an incorrect comment regarding system clock.
Corrected from 48Mhz -> 96Mhz.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit adds basic support for nRF52833 SoC.
Changes affect introducing:
- architecuture files (dtsi)
- configuration of nrfx drivers
- adaptation of inclusions based on chosen SoC
- configuration of NFCT_PINS_AS_GPIOS depends on HAS_HW_NRF_NFCT.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This patch introduces the support of the Low Power Timer
for the STM32WBxx from STMicroelectronics.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Kamil Piszczek