Many sub-systems might require to set a callback on different pins.
Thus enabling it via changing the API.
It is also possible to retrieve private-data in the callback handler
using CONTAINER_OF() macro (include/misc/util.h).
Former API is still available, and is emulated through the new one.
Using both should not be a problem as it's using new API calls.
However, it's now better to start using the new API.
Change-Id: Id16594202905976cc524775d1cd3592b54a84514
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The driver implements a GPIO device interface for STM32 MCUs. Each SoC
must provide implementation of the follwoing calls:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(),
stm32_gpio_set(). Consult gpio_stm32.h header for details on semantics
of these calls.
The driver registers 5 devices, each corresponding to a single GPIO
port. The users can then access individual pins by using values
0-15.
Change-Id: Id236b5b75c9dd091018a50a7be3501c8591cd551
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Basic driver support for the Freescale K64 GPIO module.
Note that only pin direction, read and write are supported.
Change-Id: I6587bb260197a00497be9ac991002e3dde54718d
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
The PIO controllers on Atmel SAM3 family processors can be
used for GPIOs, so this is the driver.
Change-Id: I3d5712f3a0a71025b820ca1c08dd767ee1e136d8
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Introduce the GPIO QMSI-based implementation. This is basically a
shim layer that implement's Zephyr's GPIO APIs on top of QMSI drivers.
This is an alternative driver that conflicts with the previous
GPIO_DW implementation. In order to enable it you must set:
- CONFIG_GPIO=n
- CONFIG_GPIO_QMSI=y
- CONFIG_GPIO_0=y
- CONFIG_QMSI_DRIVERS=y
- CONFIG_QMSI_INTALL_PATH="PATH_TO_QMSI"
Note that this driver currently only supports one controller instance,
GPIO_0. It is implemented this way due to a limitation from the current
version of QMSI. QMSI versions later than 1.0 doesn't have this
limitation.
Missing:
- support multiple controller instances (gpio_0, gpio_1, etc);
- enable level triggered interrupts in sync with system clock,
through setting INT_CLOCK_SYNC properly.
Change-Id: Ib61b153dae9741806a9a31d7dc1f82b96d000fbe
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
The interrupt API has been redesigned:
- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
It will be used in situations where the new static irq_connect()
won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
exactly the same way as its dynamic counterpart. The old static irq
macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
generated inline with irq_connect()
ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.
Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Such controller is found in legacy bridge on Intel's platforms. Such as
Poulsbo or Quark x1000.
Change-Id: I30f205f1e73aaa680092e92717fdacbb74046fa3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The naming convention used in the source is for there to be an
_ and not a - in the file. Fixing GPIO to be consistent with
the os naming conventions.
Change-Id: Ifc4356c14b52e2cc2411a7445b44c7cb57d2765c
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This adds a simple driver for MMIO-based GPIO ports.
It does not trigger any interrupts due to pin level at this moment.
Change-Id: I0c439f221988817e4be72653c68257ef6ace5bde
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the driver for I2C-based PCAL9535A GPIO chip.
This currently only enables minimal set of features of the chip for
very simple input/output operations, and does not support interrupt
yet.
Change-Id: I32ea07a71a38866280a96e68cff49cb0df12b85d
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
[DL: captilize commit message title; fixed some whitespaces;
changed the __initconfig_gpio_* from level 0 to level 1,
which is the level of pure_init; and added include path
to board.h; ]
Change-Id: I7eea6a6ca9e4b7cf8d1ccabb57f07f786da93ef0
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Tomasz Bursztyka