Commit Graph

1954 Commits

Author SHA1 Message Date
Maureen Helm fe4c3aacba mcux: nxp_kinetis: Move HAS_LPSCI config to ext
SoCs outside the Kinetis family can have the LPSCI module, so move the
HAS_LPSCI config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Maureen Helm bbafc833db mcux: nxp_kinetis: Move HAS_LPUART config to ext
SoCs outside the Kinetis family can have the LPUART module, so move the
HAS_LPUART config from arch/arm/soc/nxp_kinetis to ext/hal/nxp/mcux

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-09-25 12:31:59 -05:00
Anas Nashif 66f1f89da9 qemu: cleanup qemu configurations
Move all QEMU related defines to the boards and cleanup xtensa platforms
which were marked to be QEMU capable by mistake.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-23 16:51:20 -07:00
Andrew Boie df5cc172f4 gen_mmu.py: load directly
On most workstations this was unintentionally being run under Python 2.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-21 13:27:25 -04:00
Anas Nashif db4eba64da dfu: img_util: move flash defines to SoC
mcuboot_constraints.h had FLASH information related to the SoC that
should be maintained as part of the SoC and not in the subsystem. Also
fixed Makefiles to check for IMG_UTIL Kconfig and not MCUBOOT.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-21 06:46:27 -04:00
Andrew Boie 1956f09590 kernel: allow up to 6 arguments for system calls
A quick look at "man syscall" shows that in Linux, all architectures
support at least 6 argument system calls, with a few supporting 7. We
can at least do 6 in Zephyr.

x86 port modified to use EBP register to carry the 6th system call
argument.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-20 09:18:59 -07:00
Andrew Boie a23c245a9a userspace: flesh out internal syscall interface
* Instead of a common system call entry function, we instead create a
table mapping system call ids to handler skeleton functions which are
invoked directly by the architecture code which receives the system
call.

* system call handler prototype specified. All but the most trivial
system calls will implement one of these. They validate all the
arguments, including verifying kernel/device object pointers, ensuring
that the calling thread has appropriate access to any memory buffers
passed in, and performing other parameter checks that the base system
call implementation does not check, or only checks with __ASSERT().

It's only possible to install a system call implementation directly
inside this table if the implementation has a return value and requires
no validation of any of its arguments.

A sample handler implementation for k_mutex_unlock() might look like:

u32_t _syscall_k_mutex_unlock(u32_t mutex_arg, u32_t arg2, u32_t arg3,
                              u32_t arg4, u32_t arg5, void *ssf)
{
        struct k_mutex *mutex = (struct k_mutex *)mutex_arg;
        _SYSCALL_ARG1;

        _SYSCALL_IS_OBJ(mutex, K_OBJ_MUTEX, 0,  ssf);
        _SYSCALL_VERIFY(mutex->lock_count > 0, ssf);
        _SYSCALL_VERIFY(mutex->owner == _current, ssf);

        k_mutex_unlock(mutex);

        return 0;
}

* the x86 port modified to work with the system call table instead of
calling a common handler function. fixed an issue where registers being
changed could confuse the compiler has been fixed; all registers, even
ones used for parameters, must be preserved across the system call.

* a new arch API for producing a kernel oops when validating system call
arguments added. The debug information reported will be from the system
call site and not inside the handler function.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-15 13:44:45 -07:00
Andrew Boie 424e993b41 x86: implement userspace APIs
- _arch_user_mode_enter() implemented
- _arch_is_user_context() implemented
- _new_thread() will honor K_USER option if passed in
- System call triggering macros implemented
- _thread_entry_wrapper moved and now looks for the next function to
call in EDI

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 12:46:36 -07:00
Andrew Boie 9f70c7b281 kernel: reorganize CONFIG_USERSPACE
This now depends on a capability Kconfig.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 12:46:36 -07:00
Anas Nashif 1e8afbfe5a cleanup: remove lots of references to unified kernel
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-12 12:37:11 -04:00
Andrew Boie d81f9c1e4d x86: revise _x86_mmu_buffer_validate
- There's no point in building up "validity" (declared volatile for some
  strange reason), just exit with false return value if any of the page
  directory or page table checks don't come out as expected

- The function was returning the opposite value as its documentation
  (0 on success, -EPERM on failure). Documentation updated.

- This function will only be used to verify buffers from user-space.
  There's no need for a flags parameter, the only option that needs to
  be passed in is whether the buffer has write permissions or not.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 08:40:41 -07:00
Andrew Boie 3bb677d6eb x86: don't set FS/GS segment selectors
We shouldn't be imposing any policy here, we do not yet use these in
Zephyr. Zero these at boot and otherwise leave alone.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-12 08:40:08 -07:00
Erwan Gouriou 1ded7d7b33 arch: arm: stm32: factorize stm32f417xy socs defconfig files
stm32f417xe and stm32f417xg have been introduced with 2
different defconfig files. Since same code is declared
in both files, mutualize declarations in a single file.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-09-12 11:24:56 -04:00
Yannis Damigos 0f408a003c arch: soc: st_stm32: Remove unused enumeration from F4, F3 SoCs
The enumerations stm32{f3,f4}x_pin_config_mode aren't used any
more. This patch removes them.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2017-09-12 11:24:56 -04:00
Andrew Boie 1e06ffc815 zephyr: use k_thread_entry_t everywhere
In various places, a private _thread_entry_t, or the full prototype
were being used. Be consistent and use the same typedef everywhere.

Signen-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-11 11:18:22 -07:00
Anas Nashif d414e7c7ee kconfig: move fatal error handler to arch options
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif 8379b7b433 kconfig: move interrupt options into arch menu
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif 46f66f4295 kconfig: generalised stack protection options
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif 939889a202 kconfig: remove unused config DEBUG_IRQS
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif 261f898e8f kconfig: remove exta menu for x86 core options
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 09:42:35 -07:00
Anas Nashif 7c71608fc1 cleanup: remove commented #include
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Anas Nashif b1991eba94 cleanup: remove the whitespaces before the # character
Indenting preprocessor directives reduces the code readability, because
it make preprocessor directives harder to spot.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Anas Nashif 8920cf127a cleanup: Move #include directives
Move all #include directives at the very top of the file, before any
code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-09-11 12:41:07 -04:00
Marti Bolivar 32482e9cb8 flash: stm32: stm32f4: add page layout support
Add flash page layout support for STM32F4 SoCs.

This almost eliminates the need for flash_map.h, except for
STM32F4X_SECTOR_MASK, so delete the file and move the define into the
F4 implementation, to keep things simple.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-09-11 11:41:57 -04:00
Adithya Baglody 609ade891b x86: MMU: Updated MMU code to use the new macros.
Use of X86_MMU_GET_PTE to increase readability of the MMU code.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-09-07 17:13:06 -07:00
Adithya Baglody 65c2432791 x86: MMU: Miscellaneous macros related to MMU.
Helper macros to ease the usage of the MMU page table structures.
Added Macros to get Page table address and Page Table Entry
values.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-09-07 17:13:06 -07:00
Andrew Boie a34f4fb94f x86: add printk for protection faults
Most x86 exceptions that don't already have their own handlers
are fairly rare, but with the introduction of userspace
people will be seeing General Protection Faults much more
often. Report it as text so that users unfamiliar with x86
internals will know what is happening.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:35:27 -07:00
Andrew Boie 8eaff5d6d2 k_thread_abort(): assert if abort essential thread
Previously, this was only done if an essential thread self-exited,
and was a runtime check that generated a kernel panic.

Now if any thread has k_thread_abort() called on it, and that thread
is essential to the system operation, this check is made. It is now
an assertion.

_NANO_ERR_INVALID_TASK_EXIT checks and printouts removed since this
is now an assertion.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:35:16 -07:00
Andrew Boie 8eeb09765b x86: cleanup _new_thread()
Years of iterative development had made this function more complicated
than it needed to be. Fixed some errors in the documentation as well.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:33:50 -07:00
Andrew Boie 945af95f42 kernel: introduce object validation mechanism
All system calls made from userspace which involve pointers to kernel
objects (including device drivers) will need to have those pointers
validated; userspace should never be able to crash the kernel by passing
it garbage.

The actual validation with _k_object_validate() will be in the system
call receiver code, which doesn't exist yet.

- CONFIG_USERSPACE introduced. We are somewhat far away from having an
  end-to-end implementation, but at least need a Kconfig symbol to
  guard the incoming code with. Formal documentation doesn't exist yet
  either, but will appear later down the road once the implementation is
  mostly finalized.

- In the memory region for RAM, the data section has been moved last,
  past bss and noinit. This ensures that inserting generated tables
  with addresses of kernel objects does not change the addresses of
  those objects (which would make the table invalid)

- The DWARF debug information in the generated ELF binary is parsed to
  fetch the locations of all kernel objects and pass this to gperf to
  create a perfect hash table of their memory addresses.

- The generated gperf code doesn't know that we are exclusively working
  with memory addresses and uses memory inefficently. A post-processing
  script process_gperf.py adjusts the generated code before it is
  compiled to work with pointer values directly and not strings
  containing them.

- _k_object_init() calls inserted into the init functions for the set of
  kernel object types we are going to support so far

Issue: ZEP-2187
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:33:33 -07:00
Youvedeep Singh 7f2aaedfd7 arch: arm: store/restore regs r0-r3 while making function call.
In benchmark test (test_info) while making function call regs
r0 - r4 are modified into called function. Due to this value
inside r3 is getting lost.
This patch saves and restore the value in r0-r4 regs while making
function calls from assembly language.

Jira: ZEP-2314

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-08-31 14:25:31 -04:00
Youvedeep Singh 76b577e180 tests: benchmark: timing_info: Change API/variable Name.
The API/Variable names in timing_info looks very speicific to
platform (like systick etc), whereas these variabled are used
across platforms (nrf/arm/quark).
So this patch :-
1. changing API/Variable names to generic one.
2. Creating some of Macros whose implimentation is platform
depenent.

Jira: ZEP-2314

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
2017-08-31 14:25:31 -04:00
Andy Gross ecb0f3e159 arm: mpu: Account for stack guard size correctly
This patch fixes a couple of issues with the stack guard size and
properly constructs the STACK_ALIGN and STACK_ALIGN_SIZE definitions.

The ARM AAPCS requires that the stack pointers be 8 byte aligned.  The
STACK_ALIGN_SIZE definition is meant to contain the stack pointer
alignment requirements.  This is the required alignment at public API
boundaries (ie stack frames).

The STACK_ALIGN definition is the required alignment for the start
address for stack buffer storage.  STACK_ALIGN is used to validate
the allocation sizes for stack buffers.

The MPU_GUARD_ALIGN_AND_SIZE definition is the minimum alignment and
size for the MPU.  The minimum size and alignment just so happen to be
32 bytes for vanilla ARM MPU implementations.

When defining stack buffers, the stack guard alignment requirements
must be taken into consideration when allocating the stack memory.
The __align() must be filled in with either STACK_ALIGN_SIZE or the
align/size of the MPU stack guard.  The align/size for the guard region
will be 0 when CONFIG_MPU_STACK_GUARD is not set, and 32 bytes when it
is.

The _ARCH_THREAD_STACK_XXXXXX APIs need to know the minimum alignment
requirements for the stack buffer memory and the stack guard size to
correctly allocate and reference the stack memory.  This is reflected
in the macros with the use of the STACK_ALIGN definition and the
MPU_GUARD_ALIGN_AND_SIZE definition.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-31 11:20:26 -05:00
Andy Gross 85481d997b arch: arm: Remove redundant check and fix rounding
This patch removes the redundant stack alignment check being done.  The
stack definition macros enforce the alignment requirements via the
__align() directives.

In addition, fix the rounding down of the psp to be correct.  The
actual initial stack pointer is the end of the stack minus the size of
the __esf structure.  Rounding down after the subtraction will get us
to the correct offset.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-31 11:20:26 -05:00
Leandro Pereira 510e5d7ced arch: xtensa: Use the alternate _Level4Vector routine on ESP32
For some reason, the ESP32 HAL defines XCHAL_EXCM_LEVEL to 3.  This
enables a version of _Level4Vector that doesn't work on this hardware.

Without complete visibility if the version that should work be axed,
keep both in the tree, but build the working other version instead
if building for ESP32.

Jira: ZEP-2556
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-25 15:31:46 -04:00
Kumar Gala e25ee68bbd arch: arm: stm32f1: Fix how we determine pull-up/pull-down for gpio
When we mask out the GPIO High impedance/Pull-up/Pull-down field we
should be shifting the mask file, not shifting the field.  This is
because all the other defines already assume the shift.

Coverity-CID: 173640

Jira: ZEP-2538

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-08-21 11:18:03 -05:00
Leandro Pereira d52de29fba esp32: Fix redefinition of BIT() macro
Esp-idf defines the BIT macro that is also defined in Zephyr's
misc/util.h.  Fix the issue by including the esp-idf headers first, so
that a check in util.h won't redefine the macro if it's already
defined.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-19 07:50:18 -04:00
David B. Kinder 81f7c82625 doc: fix misspellings and missing EOF newlines
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-08-16 17:38:41 -05:00
Wayne Ren 480cfac4f2 arch: arc: apply STACK_GUARD_SIZE and optimize the mpu driver
* apply STACK_GUARD_SIZE, no extra space will be added if
  MPU_STACK_GUARD is disabled
* When ARC_STACK_CHECKING is enabled, MPU_STACK_GUARD will be
  disabled
* add two new api: arc_core_mpu_default and arc_core_mpu_region
  to configure mpu regions
* improve arc_core_mpu_enable and arc_core_mpu_disable

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-08-16 16:09:45 -04:00
Wayne Ren 12cc6598b0 arch: arc: Add mpu support
* add arc mpu driver
* modify the corresponding kconfig and kbuild
* currently only em_starterkit 2.2's em7d configuration
  has mpu feature (mpu version 2)
* as the minimum region size of arc mpu version 2 is 2048 bytes and
  region size should be power of 2, the stack size of threads
  (including main thread and idle thread) should be at least
  2048 bytes and power of 2
* for mpu stack guard feature, a stack guard region of 2048 bytes
  is generated. This brings more memory footprint
* For arc mpu version 3, the minimum region size is 32 bytes.
* the codes are tested by the mpu_stack_guard_test and stackprot

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2017-08-16 16:09:45 -04:00
Andrew Boie e434260e19 xtensa: soc: fix IRQ table
The linker scripts were not properly updated to the new
gen_isr_tables mechanism.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-08-16 10:59:10 -07:00
Gil Pitney 4f67a6c76d cc3200: Remove TI cc3200 SOC and LaunchXL board support
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."

Effectively, the CC3220 SOC replaces the CC3200.

This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.

Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.

Jira: ZEP-1958

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2017-08-15 11:02:48 -05:00
Andrew Boie de6663f601 esp32: fix linker script issues
- .text, .text.*, .literal, .literal.* had no matching input section
   rule and were being passed to the output binary verbatim. These
   are all now in the output "text" section as intended.

- various rules in the data section were unnecessarily using KEEP().

- SW_ISR_TABLE wasn't included in linker script anywhere and was
  ending up in its own section, and not the data section as intended.

- noinit section didn't exist at all, now defined.

Issue: ZEP-2508
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-08-14 15:27:17 -04:00
Andrew Boie 67a51f9a9e quark_d2000: fix IDT_LIST definition
This should be the same size as other x86 boards.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-08-14 14:45:07 -04:00
Gil Pitney 1a5537811f cc32xx: Redefine CMSIS IRQn_Type enum to unsigned int
Previously, calling NVIC_SetPriority(IRQn_Type irqn, ....) with
the NWP interrupt number of 171 caused a hard fault during a
subsequent svc #0 instruction during _Swap().

GNU compiler is generating a bit extension instruction (sxtb) which
converts a positive IRQ value argument to a negative value when
casting to the CMSIS IRQn_Type enum parameter type.

This generates a negative index, which then writes to an SCB
control register instead of NVIC register, causing a hard
fault later on.

This issue only occurs when passing interrupt numbers > 0x80
(eg: 171 (0xab) for the NWP) to the CMSIS NVIC apis.

The solution here is simply to redefine IRQn_Type to be an
unsigned 32 bit integer, while redefining the CMSIS IRQn_Type
enum definitions for interrupts less than zero.

Jira: ZEP-1958

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2017-08-10 16:46:49 -05:00
Wayne Ren f8d061faf7 arch: arc: add nested interrupt support
* add nested interrupt support for interrupts
   + use a varibale exc_nest_count to trace nest interrupt and exception
   + regular interrupts can be nested by regular interrupts and fast
interrupts
   + fast interrupt's priority is the highest, cannot be nested
* remove the firq stack and exception stack
   + remove the coressponding kconfig option
   + all interrupts (normal and fast) and exceptions will be handled
     in the same stack (_interrupt stack)
   + the pros are, smaller memory footprint (no firq stack), simpler
     stack management, simpler codes, etc.. The cons are, possible
     10-15 instructions overhead for the case where fast irq nests
     regular irq
* add the case of ARC in test/kernel/gen_isr_table

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-08-10 12:47:15 -04:00
Huaqi Fang 725c525a13 boards: em_starterkit: Move peripheral configs from soc to board level
Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-08-09 23:21:13 -04:00
Huaqi Fang 7ac0a6a9d1 arc: em7d: Report error when build for 2.3's em7d
When you build application for em starterkit 2.3 em7d, it will
report error during build since it is not supported currently.

Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-08-09 23:21:13 -04:00
Huaqi Fang 8dfefdf310 arc: em9d/em11d: Update default configurations
Update configurations to support em9d and em11d in
em starterkit 2.2 and 2.3

Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-08-09 23:21:13 -04:00
Huaqi Fang c58aadfece arc: em9d/em11d: Modify and cleanup soc.h
em starterkit has two versions, 2.2 and 2.3.
Change soc.h to support both versions,
main changes are the interrupt connections.

Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
2017-08-09 23:21:13 -04:00