IRQ_CONNECT_STATIC now has the IRQ flags as the sixth parameter.
Change-Id: I680b21c92471e6bcb793598adcd286a73d539ddf
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Avoid having to remove quotes wherever the platform name is used
by exporting the variable only once.
Change-Id: I4cb51901e4ac19d70d0310fe6bbacd157f586661
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
IRQ_CONNECT_STATIC now has the IRQ flags as the sixth parameter.
Change-Id: Ib3efe15a128d74b84d83df3f8aeb39cdcea5ee41
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
uart_pipe when enabled was overriding all previous objects.
Change-Id: I5620b56dc7e42f887a7b78e07470e729a266d5f7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The HPET reads its frequency at runtime, and thus must set all relevant
global constant values at runtime as well.
Change-Id: I965102bbdcea370297d5a2bbe14177ec0d0d3794
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Some timer devices, such as the HPET, read their frequencies at runtime.
All global constant values must be set at runtime in that case.
Change-Id: I408babce6deb857748a87691132d7e27e88f0bb8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Do not depend on environment variables and use a kconfig variable
for defining the architecture.
In addition, remove the X86_32 variable, it just duplicates X86 for
not good reason, at least until start supporting MCUs with 64bit.
Change-Id: Ia001db81ed007e6a43f34506fed9be1345b88a4b
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
- Provide the irq flags to IRQ_CONNECT_STATIC
- Provide the actual IRQ for that controller
Change-Id: If660baca7e92065cfdb588a2ae86ff13da0918eb
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Build the actual driver when relevant
- Provide the IOAPIC stub
- Provide the IRQ flags for IRQ_CONNECT_STATIC
- Set the default IRQ priorities
Change-Id: Iea20ef67c92cf7f48791fba5a8021448b7059950
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SYS_GET_DEVICE() needs the name set in DECLARE_DEVICE_INIT_CONFIG() not
the one in IRQ_CONNECT_STATIC().
Change-Id: Id1ed66953c863531411b34594ffed669ad524ef5
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
That fixes a build error. Platfom's board.h have to provide such flags
if they enable dw gpio 1 controller.
Take the opportunity to provide the right isr to IRQ_CONNECT_STATIC.
Change-Id: I16900ea04f7f7c5d3c99b93a92b00c1f651494de
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Original name was too generic and confusing. This patch renames
driver to pipe UART and moves it to console drivers folder. Kconfig
destription is also improved.
Change-Id: I716fdbf7d636bbdc03b0fce27a59fd866f473246
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
This module is based on the standard Local APIC and IO APIC source modules.
This modules combines these modules into one source module that exports the
same APIs defined by the Local APIC and IO APIC header modules. These
routine have been adapted for the Quark D2000 Interrupt Controller which has
a cutdown implementation of the Local APIC & IO APIC register sets.
Change-Id: Ic80aa78918483663d76054ebadefa08d8a3f188a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Adds the register definition for the DW GPIO hardware block.
This set of registers and offsets are specific for the SS
GPIO hardware block in the Quark SE platform.
In particular, the register BOTHEDGE (offset 0x68 in the
main GPIO block) does not exist on the SS GPIO block.
Change-Id: I4e16ec7c8e89015be1fc8bcdb1b7fa5377890b9d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This adds the I2C driver for the Sensor Subsystem on Quark SE.
This provides minimal support for the I2C controller, and does
only synchronous transfer at the moment.
Change-Id: I400b8ff3390d4b641bed5b8c617830c4217de3ff
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit adds the Synopsys source code for the arc ADC driver.
Change-Id: I140a63505685cda8ec9d3174b7cf4fc1e2e91b06
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This adds the driver to support DesignWare AIO/Comparator
under drivers/aio.
Change-Id: Id6cb1b507c0526098f163f74c188e990590797c2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Such controller is found on Quark SE Lakemont and ARC cores. This
driver currently supports the Lakemont core (x86).
Change-Id: Iefebd6ce9dbe81aa3902e7c2d801b07c027c548a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Implements a low-level IPI driver for Quark SE mailboxes.
Configures the Quark SE platform to initialize it and
configure an IPI console from ARC->LMT on channel 4.
Change-Id: I30123771d04c2e06ea6fcca585fd4ef74c0717a7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quark SE provides various clock controllers through its SCSS block.
Peripheral, external, sensor, and others.
This current drivers provides only the clock gating capability, for
peripheral, external and sensor. But it could support divider and more
other features once defined in the generic API.
Note: such clock has _nothing_ to do with a Real Time Clock (RTC).
An RTC provide clock timing like a watch would do. Here the clock
controller is about circuit clocking.
Change-Id: I1a365ae730dfc6be7686271f7fbb693e64a6ff6f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding DW real time clock support. This driver is used by the Quark SE
and Quark D2000 SoCs.
Change-Id: Iba8ddee1b1b5fee298db95b63418e152774662a4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The driver should handle the initialization instead of relying on
platform initialization. This is to conform to the driver model.
Change-Id: Idc95d59bce2470b5118e416ee05f07548991a15c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
since we are in the same directory, include the file directly.
Change-Id: I21c959538e4a3d9e3fba99eaa9b09697fffe25b0
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
since we are in the same directory, include the file directly.
Change-Id: I8c676e1e5acd7dbab2c283d914a3ef62c2d36cdc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Changing the ROM struct's interrupt_vector to reflect
what the value is properly referencing.
Change-Id: Ifb284821e82e01123c51a848d694da19e442c1e8
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Due to a quirk of the k20 UART, when checking if either a Tx or Rx
irq is ready, one must first check whether the UART has enabled the
Tx and/or Rx interrupts. If this is not done, then all one is doing
is testing the UART to determine if it is ready to Tx and/or Rx.
Change-Id: I08a8280ed9fb0faef586f3c7d7befb3bfdec1e2d
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
There's no need to do manual minumum calculation when there's the
min() helper available.
Change-Id: I4d5cfb088d9e6499750664680419ab4beb56e0d5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
We can remove the need for the extra 1-byte headroom by simply
directly writing the H:4 header with uart_poll_out(). Also the
separate uart_out() function can be removed by taking advantage of the
counters already present in the net_buf.
Change-Id: I54bd852e28f416b3de250cd9f8a126269cccfc14
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
We know the needed values at build-time, so there's no point in having
a runtime mechanism of accessing them in the code. Having the values
as defines makes it e.g. possible to use them as input for defining
the size of buffer pools.
Change-Id: Ib7556644719bfb631e638fa5bf29f3d1747a5072
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
It is more intuitive to assume that the driver send() consumes (takes
ownership) of the buffer given to it.
Change-Id: I53d9cbebc0564d1d11110fc78a62ce0bbb3cdfd2
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Flags allow passing IRQ triggering option for x86 architecture.
Each platform defines flags for a particular device and then
device driver uses them when registers the interrupt handler.
The change in API means that device drivers and sample
applications need to use the new API.
IRQ triggering configuration is now handled by device drivers
by using flags passed to interrupt registering API:
IRQ_CONNECT_STATIC() or irq_connect()
Change-Id: Ibc4312ea2b4032a2efc5b913c6389f780a2a11d1
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
Somehow through the process of enabling Galileo, we have partially lost
the functionality needed to enable I2C1. Bringing back the I2C
configuration options for I2C1 to the DW IP block.
Change-Id: I296bd9c3d167969df5b2fe17627633f5ec4b1ba4
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Such controller is found in legacy bridge on Intel's platforms. Such as
Poulsbo or Quark x1000.
Change-Id: I30f205f1e73aaa680092e92717fdacbb74046fa3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Now make use of sys_io_clear_bit and sys_io_set_bit
Change-Id: I11ebcd8c31d2a4c6d3dac37a0eca0ffcfacead61
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
A tiny fix where the pin is the bit position, not its mask.
Change-Id: I4ed8c4b2968ff28b407cab88903351bafe6501ba
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fixes the logic in the routine k20_uart_fifo_read() so that it reads the
data from UART if the status register 1 indicates that data is available.
Change-Id: I1722b013e05c7477587c07f5a0b90c753ba34aab
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
The ADC implementation requires that the kconfig option NANO_TIMEOUTS be
enabled as it uses the routine fiber_delayed_start().
Change-Id: Iec49fec4badd3fcf173a2d2cc9d2924299190150
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
- Changed behavior of duty cycle to have the signal ON time as the
duty percentage instead off the off time. Note however, this requires
that the off time is controlled. The behavior seems to be inverse of
what the user will expect on the header IO.
Change-Id: I1e7abf0324509de375d545a0215fd1edf2283814
Work-by: Johan Kruger <johan.kruger@windriver.com>
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Rename them to SYSTEM_CLOCK_DISABLE and sys_clock_disable to put
the symbols in the proper namespace and to align with the rest of
the timer APIs.
Change-Id: I341cdb1bd6cc01e5662d8526c293d4e0acd6ec24
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
ioapic_mkstub applies only when an IOAPIC is available in the platform.
Change-Id: I40294e4c11ef04739a1ce2146d125f3c5478013d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
This patch updates the ISR initialization code to reflect recent
changes in the underlying Zephyr ISR infrastructure. It also adds
assertions to detect failures to lookup device bindings during
initialization.
Change-Id: I4bf1955da44a97f8c2652b96a390804c5cea73e3
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Anas Nashif