Commit Graph

7 Commits

Author SHA1 Message Date
Loic Poulain e980ef8a8e soc: nxp_imx: Add on-chip flash code location support
iMXRT1064 has 4MB on-chip Flash memory (flexspi2) mapped to 0x70000000.
Add it as configurable code location for MIMXRT1064-EVK board.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-02-26 08:04:40 -06:00
Maureen Helm 0540b1a699 soc: nxp_imx: Move code/data location configs to soc level
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:

warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice

The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.

The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-13 17:52:20 -05:00
Maureen Helm bf0abe4438 soc: nxp_imx: Enable mcux elcdif driver and clocks
Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-07 14:28:55 -06:00
Maureen Helm 501db1e0b9 soc: nxp_imx: Promote driver defaults to soc series level
Streamlines repetitious code enabling default drivers by promoting it to
the soc series level.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-01-28 21:21:01 -05:00
Aurelien Jarno 17f4d6bec7 soc: nxp_imx: fix ENET_PLL selection for MIMXRT1021
Kconfig currently emits a warning when building for a MIMXRT1021 SoC:

  warning: INIT_ENET_PLL (defined at
  soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052:66) has direct
  dependencies NET_L2_ETHERNET && SOC_MIMXRT1052 && SOC_SERIES_IMX_RT
  with value n, but is currently being y-selected by the following
  symbols:
   - SOC_MIMXRT1021 (defined at soc/arm/nxp_imx/rt/Kconfig.soc:12),
  with value y, direct dependencies <choice> (value: y), and select
  condition <choice> (value: y)

This is due to the fact the ENET PLL is the one used by the ARM core on
the MIMXRT1021 so it is always enabled, while it is declared protected
by NET_L2_ETHERNET and SOC_SERIES_IMX_RT.

Fix that by declaring the symbol in Kconfig.defconfig.series.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2019-01-22 08:37:39 -06:00
Maureen Helm b5551d0690 soc: boards: Reserve space for the imx boot header at the soc level
Moves the default TEXT_SECTION_OFFSET from the board level to the soc
level for the imx rt series. This offset is used to reserve space for
the imx boot header for external xip flash images.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-01-09 16:01:25 -06:00
Anas Nashif 70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00