According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename CONFIG_SOC_POWER_MANAGEMENT_TRACE to CONFIG_NPCX_PM_TRACE so that
it is clear that it's a NPCX specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove a redundant symbol that was used as a proxy to enable CONFIG_PM
and CONFIG_PM_DEVICE. If an application needs to enable PM, it should
just enable PM subsystem Kconfig options. Furthermore, there's no clue
"SOC_POWER_MANAGEMENT" is a NPCX specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit includes the following:
1. Add symbol for choice option. So we can override the default value
by an earlier definition.
2. NPCX9 doesn't support 33MHz SPI clock in the header. So disable the
option for NPCX9.
3. NPCX9 support 512K flash. Change default to 512k for NPCX9.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
To support west OpenOCD path image flashing, this generates an npcx hex
image from the npcx BIN image. Moreover, this also changes the name of
npcx output image by CONFIG_KERNEL_BIN_NAME.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
This CL adds the support for npcx9m3f and npcx9m6f chips in ecst.py
script which generates the NPCX firmware header.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL adds the soc drivers for npcx9 series. There are two soc part
numbers, npcx9m3f and npcx9m6f, are introduced. We also move soc family
configurations from /nuvoton_npcx/npcx7/Kconfig.soc to
nuvoton_npcx/Kconfig.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
NPCX series ROM code changes the chip basic setting by firmware binary
header for loading the firmware from flash to RAM. Add the following to
improve the ec firmware header setting:
- Move the ECST which generates the firmware binary header to NPCX
common folder. All the following NPCX series chips can use this.
- Add ecst setting option in Kconfig.
Signed-off-by: Yuval Peress <peress@chromium.org>
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Initial support for Nuvoton NPCX7M6FB SoC of NPCX series which is a chip
family of embedded controllers (EC) and targeted for a wide range of
portable applications. We implemented the SoC skeleton in
soc/arm/nuvoton_npcx since there're many chip families in Nuvoton and
aim to different markets such as PC, General MCU, and Audio. The
architectures and hardware modules are different between them. Hence, we
suggest using the company name plus with chip series for better
understanding.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Gerard Marull-Paretas