This commit adds sys_set_power_state() function with support for EM1
Sleep, EM2 Deep Sleep, EM3 Stop power modes on Silabs SoCs.
Tested on efr32_slwstk6061a board.
Note: No support for efm32hg, efm32wg series at this point due to the
missing possibility of placing function code in RAM, required by errata
in SiLabs library code.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
'soc' logger module may be used by any SoC related code located in soc/.
An implementation file requiring logger services should include
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
to use the 'soc' logger instance.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
We should be selecting CPU_HAS_ARM_MPU at this level and not
CPU_HAS_MPU. Change the cases of CPU_HAS_MPU to CPU_HAS_ARM_MPU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit removes "select SYS_POWER_*_SUPPORTED" entries from
Kconfig on SoCs which are not implementing sys_set_power_state()
method used to control power mode.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Some of power states used numerical suffix while otthers not.
This commit adds proper suffix to all power state names.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
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This commit simplifies OS <-> Application interface controlling power
management. In the previous approach application-based PM required
overriding sys_suspend() and sys_resume() functions. As these functions
actually implemented power state change, in such case application
basically had to provide own implementation of all PM-related stuff,
which was not portable and hard to maintain.
This commit changes this scheme: The sys_suspend() and sys_resume()
are now system functions while the application could either use
built-in power management policies or provide its own. All details
of power mode switching are now handled by the OS.
Also, this commit cleans up the Kconfig options related to system-level
power management grouping them under common CONFIG_SYS_PM_ prefix.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
A common driver is shared between stm32 chips, which was not the case
for stm32f3 series. As a consequence stm32f3 was not maintained
equally and was missing features such as flash layout or dts based
configuration.
Besides, drivers had some flows such as wrong bus clock and
missing HSI clock activation which lead to issues on boards not
using HSI as main clock.
As a consequence this commit moves stm32f3 series flash driver to
common stm32 flash drivers.
Fixes#4197
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.
The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt dts fixup was missing gpio 2,3,4 instances. This caused a
build error in the gpio driver when an application enabled:
CONFIG_GPIO_MCUX_IGPIO_2=y
CONFIG_GPIO_MCUX_IGPIO_3=y
CONFIG_GPIO_MCUX_IGPIO_4=y
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:
warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.
The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
soc.h references Kconfig symbols which aren't defined. Define the
specific SoC versions that are referenced in soc.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In soc.h reference to CONFIG_SOC_PART_NUMBER_SAM4S18B should have been
CONFIG_SOC_PART_NUMBER_SAM4S8.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit changes the names of SYS_POWER_DEEP_SLEEP* Kconfig
options in order to match SYS_POWER_LOW_POWER_STATE* naming
scheme.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Initial support for Microchip MEC1701 series is incorporated to the
tree. Additional support for UART is also included. This SOC supports
two operation modes for interrupts (Direct and Aggregated). For this
commit, the interrupts are configured in direct mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
The eth mcux driver has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The soc nxp_imx RDC code has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Select CPU_HAS_FPU_DOUBLE_PRECISION in SAM E70 and NXP I.MX RT
series of MCUs to signify double-precision floating-point unit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
SoC family STM32F769XI supports both double and single precision
floating-point unit. This commit enables double-precision by
default in this SoC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit introduces a Kconfig option for ARM SoCs, to signify
that the SoC implements a double-precision floating point unit.
The option is utilized in cmake/fpu-for-gcc-m-cpu to select the
appropriate GCC compile option flag for FPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This patch adds basic support for the PWM devices available on the Atmel
SAM family. Beside enabling the driver, everything is selected through
the device tree, including enabling the PWM0 and PWM1 devices. Thus
CONFIG_PWM_0 and CONFIG_PWM_1 are ignored.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Provides a STM32 RTC driver using new counter API.
Driver does not support wrap related functions (set, get, ..)
Fixes#11373
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The CMSDK Timer can be used as a timer or as a counter.
The unified interface proposed in #8340 unifies counter.h and rtc.h to
provide a common interface.
This patch modifies the timer implementation of the single timer to
make it compliant with the new proposed interface.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Removing duplicates in selects for config SOC_NRF52832 and
SOC_NRF52840. Duplicates were unexpected merge artifacts.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In case of !XIP, set defaults for CONFIG_FLASH_SIZE and
CONFIG_FLASH_BASE_ADDRESS in Kconfig.
Fixes: #13113
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Now that the SAM Ethernet driver can work when the cached is enabled, it
is possible to unconditionally enable the data cache on the SAM E70 SoC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Each platform is now specifying list of supported power states
as a Kconfig options. Some of the specified states could be
disabled in runtime. As result there is no need for the removed
interface.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Currently each SoC has to define own list of power states.
However all these definitions have to be the same, as common power
management code uses them.
This commit replaces per-soc power state list by global definition.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit ports power management code from nRF52 to the nRF51 SoC,
enabling usage of Zephyr Power Management policies on this platform.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit updates the power management code for nRF52 SoC
series after recent changes in Zephyr power management subsystem.
Changes:
- Removed LPS modes, as they are not supported by HW.
(previous implemntation used CONSTLAT and LOWPWR settings
in NRF_POWER to implement low power modes, however these
knobs should be used only when application needs ultra low
CPU wake-up time).
- Reworked code in order to allow adding custom power levels
on the application level and provide better integration
with power management subsystem.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
exti driver implementation does not fit all SoCs because
some EXTI ip does not match stm32_exti register map provided.
Instead of providing exti register map for all SoCs, use LL API
which abstracts IP variations and enable uniform use of the drivers
on all STM32SoCs.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that a hw-flow-control DTS binding has been added for MCUX uart,
let's check for the DT_ define and enable support in the MCUX HAL
layer.
Signed-off-by: Michael Scott <mike@foundries.io>
Piotr Mienkowski