Add sam0_rtc_driver that implements system timer API on top of the RTC
and can be used as a replacement for the default systick timer.
Signed-off-by: Martin Benda <martin.benda@omsquare.com>
This commit introduces the possibility to have multiple
device nodes attached to the same I2S controller. For this
purpose a new i2s-device.yaml description has been introduced
with the a 'reg' property to define the logic number of the
device. For example, if two microphones are attached to the
same I2S port (say 1) to achieve stereo audio, the two microphones
might be described in dts as:
&i2s1 {
status = "ok";
mic@0 {
compatible = "...";
reg = <0>;
label = "...";
};
mic@1 {
compatible = "...";
reg = <1>;
label = "...";
};
};
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fix the following dtc warnings on S1000:
Warning (simple_bus_reg): /soc/pinmux@81C30: simple-bus unit
address format error, expected "81c30"
Warning (alias_paths): /aliases: aliases property name must
include only lowercase and '-'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added UART4 alternate pin function for L4 µC for PC10 and PC11.
Corrected naming of previously defined UART4 TX and RX defines.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Adding a binding .yaml file for Nordic FICR and the
corresponding macro definition for NRF_FICR in
nrfx_config_nrf9160.h header file.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Correct the names of the binding files, so they comply
with binding file naming nomenclature.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit contributes a binding .yaml file for Nordic nRF
SPU peripheral and defines the macro for the peripheral base
register address in file ext/hal/nordic/nrfx_config_nrf9160.h.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add a level 2 interrupt controller for the RV32M1 SoC. This uses the
INTMUX peripheral.
As a first customer, convert the timer driver over to using this,
adding nodes for the LPTMR peripherals. This lets users select the
timer instance they want to use, and what intmux channel they want to
route its interrupt to, using DT overlays.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Mike Scott <mike@foundries.io>
Add a Peripheral Clock Controller (PCC) driver. This gates and ungates
clocks to various peripherals on the SoC.
Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Marti Bolivar <marti@foundries.io>
The OpenISA RV32M1 SoC has four CPU cores. Two of these are RISC-V
32-bit cores, which are named "RI5CY" and "ZERO-RISCY". (The other two
cores are ARM Cortex-M0+ and -M4.) This patch adds basic SoC
enablement for the RISC-V cores:
- basic dtsi, to be extended as additional drivers are added
- SoC definition in soc/riscv32/openisa_rv32m1 for RI5CY / ZERO-RISCY
- system timer driver for RI5CY, based on LPTMR0 peripheral
The timer driver will be generalized a bit soon once proper
multi-level interrupt support is available.
Emphasis is on supporting the RI5CY core as the more capable of the
two; the ZERO-RISCY SoC definitions are a good starting point, but
additional work setting up a dtsi and initial drivers is needed to
support that core.
Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
We get the following warning:
extract_dts_includes.py: WARNING: id field set in
'SMSC/Microchip LAN9220 Ethernet controller', should be
removed.
Removed the id: field to fix.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SPI1 controller that is connected to the mcr20a block utilizes the
hardware chipselect and not a GPIO CS. So remove the cs-gpios property.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SPI0 node had a property called 'cs' which wasn't used or defined as
part of the binding yaml. So let's remove it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get warnings from dtc when building any of the NXP i.MX-RT boards of
the form:
mimxrt1020_evk.dts_compiled: Warning (simple_bus_reg):
/soc/random@400CC000: simple-bus unit address format
error, expected "400cc000"
Simple fix to make everything lowercase to have the unit-address and reg
match.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use auto-generated device tree macros in LIS2DH driver to avoid
usage of dts.fixup files. The triggered interrupt part has been
slightly hacked to automatically understand whether only int1 is
configured or both int1 and int2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Adds STM32 L452 soc with L452xC variant. L452 has 160 KB SRAM;
therefore, mpu mem config has been extended; IRQ number is based on
'stm32l452xx.h'.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Add support to STM LIS2DS12 3-axis accelerometer driver.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.
Currently it uses high resolution only as power mode.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use the symbol generated from DT so that it is common for nRF9160
and nRF5 family SoCs. To avoid artificial renaming of CLOCK_POWER_IRQn
to POWER_CLOCK_IRQn.
For nRF5 family SoCs clock nodes were not defined so far, thus they are
added so that the proper DT symbol is generated for them as well.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing node for instance 0 of the RTC peripheral and use an alias
to the flash-controller node instead of the nvmc node definition (there
is no need to have a separate node just to get the NVMC base address).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The board has SMSC LAN9220 (actually as an "IP core" in an
FPGA-emulated SoC). The patch includes DTS bindings for this device.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Driver for networking device Microchip ENC28J60 is used as SPI slave,
moved to DTS type definition. Samples echo_client and echo_server use
this device on Arduino 101 board.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Support musca board as a variant, it is a Cortex-M33 based SoC.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Signed-off-by: Minos Galanakis <minos.galanakis@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds a serial driver for the ARM PL011 IP block.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Zephyr has been using "i2c,eeprom" for the compatible property. This is
inconsistent with the property documentation which expects
"manufacturer,model" to be used.
The Linux standard compatible name for I2C EEPROMs is "atmel,at24". The
standard for SPI EEPROMS is "atmel,at25". We don't have support for the
latter, but change the name for the former.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Fix the QSPI and hyperflash nodes to be proper SPI children and expose
the address range for direct access as part of the controller's reg
region.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The initial support of iotdk which is a board based on Synopsys
ARC IoT SoC.
In this commit, it includes
* processor support
* UART driver
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Convert the w25qxxdv driver to use device tree for SPI device params.
Updated the Arduino 101 config to use device tree to specify the SPI
flash. Update the arduino_101_sss to drop Kconfig support for the
w25qxxdv flash.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
By default, after reset SWO signal is not connected to GPIO pin.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
* Add DTS support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add uart5 nodes to stm32f1 series dts.
Provide matching dts_fixup add-on.
Signed-off-by: Chen Han <qq1433255094@outlook.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Features:
- Uses the SPI bus to communicate with the card
- Detects and safely rejects SDSC (<= 2 GiB) cards
- Uses the optional CRC support for data integrity
- Retries resumable errors like CRC failure or temporary IO failure
- Works well with ELMFAT
- When used on a device with a FIFO or DMA, achieves >= 310 KiB/s on a
4 MHz bus
Tested on a mix of SanDisk, Samsung, 4V, and ADATA cards from 4 GiB to
32 GiB.
Signed-off-by: Michael Hope <mlhx@google.com>
This commit introduces the main device tree header files (.dtsi)
for Nordic nRF9160 SOC, for both Secure and Non-Secure domains.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Convert lsm9ds0_gyro driver to get the device name as well as
i2c slave information and gpio info for triggers from device tree.
Updates the build_all test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We only need to add the reg property in flash0 and sram0,
in the different DTS headers for the nRF SOCS. We do not
seem to need to define the nodes again. This commit applies
this simplification for flash and sram sizes definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Fix the following warning that shows up in some NRF device tree files:
Warning (simple_bus_reg): /soc/pwm@4002D000: simple-bus unit
address format error, expected "4002d000"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On i.mx6/7 the TCMU and TCML regions are specific to instruction or
data. So use the nxp,imx-itcm for TCML and nxp,imx-dtcm for TCMU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The imx-rt-{i,d}tcm bindings can actually be utilized on the i.MX6/7 as
well for the TCM{L,U} regions of memory as they are specific to
instruction or data.
So let's rename imx-rt-{i,d}tcm to imx-{i,d}tcm.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert lsm9ds0_mfd accel/magn driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Due to a bad timing in merging PR #10744 and PR #12083, the flash0 node
in stm32f756Xg.dtsi ended-up at the root of the device tree, while the
flash0 node it is trying to override in stm32f7.dtsi is now under
/soc/flash-controller.
This patch fixes that by moving it at the right location.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).
Added basic documentation and some soc definitions for the
stm32 f756XX soc.
Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
Adds a second sram node to the k64 device tree to acknowledge that the
additional sram is present in hardware, but deliberately not used in
zephyr until an outstanding issue is solved. The upper and lower sram
nodes are contiguous in the memory map, however the Cortex-M4
architecture does not support misaligned accesses across the boundary
between the two nodes.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
We currently get a number of warnings like:
Warning (simple_bus_reg): /soc/otgfs_phy: missing or empty
reg/ranges property
This is due to the usb phy nodes not have a reg property since they
don't have an mmio address associated with them.
Move the phy nodes out of the SoC node so their lack of a reg property
will not cause a warning. This is similar to how Linux dts files
handle the phy nodes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix the following warning that shows up in some NRF device tree files:
Warning (simple_bus_reg): /soc/pwm@4001C000: simple-bus unit
address format error, expected "4001c000"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
1. PWM device node added with alias to all
nRF52x DTSI files. 1 instance for
nRF52810, 3 instances for nRF52832, and
4 instance for nRF52840.
2. Added yaml binding for Nordic PWM node.
Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
Add comptiable into the device tree and associated binding files for NXP
i.MX RT ITCM/DTCM memory regions.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert lis3dh accelerometer driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Now that we can support the same compatible but different bus types,
update the LSM6DSL support to utilize the same compatible for either I2C
or SPI. We rename the i2c binding file to st,lsm6dsl-i2c.yaml just to
be a bit more clear.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a dts binding file for the cc1200 and move the Kconfig options for
SPI and GPIOs to DTS for the CC1200 driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds dts/bindings/adi,adxl372-spi.yaml for
using ADXL372 on SPI bus instead of I2C which is used
in dts/bindings/adi,adxl372.yaml.
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
The STM32L433 has the same layout than the STM32L432, additionally it
has GPIOD, GPIOE, I2C2, USART3 and SPI2.
Also move USART3 and SPI2 out of stm32l4.dtsi since STM32L432 does not
have it.
Fixes#10909.
Signed-off-by: Markus Roppelt <markus.roppelt@gmx.de>
Convert lis2dh accelerometer driver to get the device name as well
as i2c/spi slave information from device tree. Updates the build_all
test accordingly. (issue #11605)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
There are different interrupt numbers for R22 v R23. Before this was
being handled via using Kconfig symbol CONFIG_BOARD_EM_STARTERKIT_R23 in
emsk_dt.h. Since we want to remove use of Kconfig in dts we handle this
via different dtsi files and having the proper one included by the
proper board revision dts file.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Towards removing Kconfig from DTS we need to move setting of the sizes
of ICCM/DCCM into the SoC specific DTS files and out of emsk_dt.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFM32 Pearl Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
Ported from EFM32WG:
https://www.silabs.com/documents/public/application-notes/an0918.0-efm32_to_efm32jgpg_migration_guide.pdf
Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds the virtualcom device to the nrf52840 SoC dts and adds a board
specific nrf52840_overlay.dts file, copied exactly from the
arduino101_overlay.dts file, to set the console device name
appropriately for the subsys/usb/console sample project.
There were no clear alternatives to add a usb_cdc: virtualcom device to
all known SoC devices with USB support as should probably happen.
There was also no clear alternatives to add a non-board specific overlay
to the example.
This fixes a specific problem with the nrf52840-dk board for this sample
project.
Signed-off-by: Tom Burdick <thomas.burdick@gmail.com>
Martin Benda