Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Introduces the location property and adds the ability to use values
generated by the device tree configuration.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When we fixed the missing reg property in the cpu node, we forgot to
add #address-cells & #size-cells for the node.
This fix the following warnings we get:
Warning (reg_format): "reg" property in /cpus/cpu@0 has invalid
length (4 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /flash: node has a reg or ranges
property, but no unit name
or
Warning (unit_address_vs_reg): /memory: node has a reg or ranges
property, but no unit name
Fix by adding unit address that is missing to flash & memory nodes.
Additionally the Silabs memory nodes didn't have a compatiable or
device_type, so add those properties as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/cpu@0: node has a
unit name, but no reg property
Fix by adding reg property to missing cpu nodes.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include. This lets us
remove:
CONFIG_SOC_PART_NUMBER_EFM32WG990F256
CONFIG_SOC_PART_NUMBER_EFR32FG1P133F256GM48
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Where missing add compatible = "soc-nv-flash". Also added a label for
all the soc-nv-flash that we might use in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFM32 Wonder Gecko MCU includes:
* Cortex-M4F core at 48MHz
* up to 256KB of flash and 32KB of RAM
* USB with host and OTG support
* multiple low power peripherals
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Piotr Mienkowski