Commit Graph

26 Commits

Author SHA1 Message Date
Kumar Gala ad18f84f50 arch: arm: Refactor CONFIG_CORTEX_M
Clean up Kconfig so each SoC just selects the specific Cortex-M
implementaiton rather than having to select both CORTEX_M and
CORTEX_{M0, M3, M4, etc.}.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
Kumar Gala 5a5e352899 dts: ti: Refactor TI SoC dts.fixup into arch/arm/soc/ti_simplelink
Move common SoC dts.fixup defines into
arch/arm/soc/ti_simplelink/<BAR>/dts.fixup so we remove duplication in
the boards and only have board specific defines in
boards/arm/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-21 10:57:23 -06:00
Gil Pitney 3f68f2bc97 soc: ti_simplelink: cc32xx: Remove ARMV7_M guard from CMSIS_IRQn_Type
Remove unnecesary #ifdef CONFIG_ARMV7_M guard in soc.h file.

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2018-02-06 17:34:25 -06:00
Sebastian Bøe 0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Leandro Pereira da9b0ddf5b drivers: Rename `random` to `entropy`
This should clear up some of the confusion with random number
generators and drivers that obtain entropy from the hardware.  Also,
many hardware number generators have limited bandwidth, so it's natural
for their output to be only used for seeding a random number generator.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Anas Nashif 9b93334832 soc: ti_simplelink: rename header directory for registers
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-31 12:32:34 -04:00
Manivannan Sadhasivam 05e1d8c46a arch: arm: soc: ti_simplelink: Add MSP432P401R SoC
This patch adds SoC support for TI SimpleLink family MSP432P401R.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2017-10-19 12:16:11 -05:00
Gil Pitney 4f67a6c76d cc3200: Remove TI cc3200 SOC and LaunchXL board support
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."

Effectively, the CC3220 SOC replaces the CC3200.

This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.

Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.

Jira: ZEP-1958

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2017-08-15 11:02:48 -05:00
Gil Pitney 1a5537811f cc32xx: Redefine CMSIS IRQn_Type enum to unsigned int
Previously, calling NVIC_SetPriority(IRQn_Type irqn, ....) with
the NWP interrupt number of 171 caused a hard fault during a
subsequent svc #0 instruction during _Swap().

GNU compiler is generating a bit extension instruction (sxtb) which
converts a positive IRQ value argument to a negative value when
casting to the CMSIS IRQn_Type enum parameter type.

This generates a negative index, which then writes to an SCB
control register instead of NVIC register, causing a hard
fault later on.

This issue only occurs when passing interrupt numbers > 0x80
(eg: 171 (0xab) for the NWP) to the CMSIS NVIC apis.

The solution here is simply to redefine IRQn_Type to be an
unsigned 32 bit integer, while redefining the CMSIS IRQn_Type
enum definitions for interrupts less than zero.

Jira: ZEP-1958

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2017-08-10 16:46:49 -05:00
Kumar Gala d426d122f1 boards; cc2650_sensortag: Get building with sanitycheck
Board port was done before the yaml transition, so was missing a
cc2650_sensortag.yaml.  As such when we build all the test we get a few
build errors that we also fixed up.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-23 15:05:10 -05:00
Geoffrey Le Gourriérec fdf1785775 arm: Add support for TI's CC2650 SoC.
Add support in arch/arm/soc/ti_simplelink, along with support
for CC32xx SoC.

Signed-off-by: Geoffrey Le Gourriérec <geoffrey.legourrierec@smile.fr>
2017-06-16 16:18:12 -04:00
Gil Pitney c73a1eb806 cc3220sf: Add support for the TI CC3220SF SoC
The CC3220SF is a replacement for the CC3200 SoC, comprising
a network coprocessor and Cortex-M4 MPU.

This leverages the CC3220 SDK driver peripheral library in ROM,
and some files built from ext/hal/ti/.

Jira: ZEP-1958

Change-Id: I892b212c178e05d84ff1d716dde593ced653ae6d
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2017-04-28 15:06:41 -05:00
Gil Pitney 9b12803bf7 cc3200: Resolve DTS fixup.
As part of the transition to Device Tree, a temporary
HAS_DTS configuration variable, and a .fixup file per board
with symbol aliases were added.

This patch removes the cc32xx related fixup file
definitions, except for those used additionally outside
the cc32xx drivers.

Since cc32xx has DTS files, and since HAS_DTS will always be true,
it also removes the 'if !HAS_DTS' blocks from the cc32xx Kconfig
files.

Change-Id: I1c1b9f734795f523342f82ab32f2a38983812c0b
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-04 17:55:12 -05:00
Kumar Gala ffd7c9f696 dts: Remove num-irqs from the arm nvic node
Move back to getting the number of IRQs from Kconfig.  We do this
because the number of IRQs should really just be determined by scanning
the device tree and figuring out the highest IRQ value used.

Change-Id: I8e0dbec1d9d036d4e899b237c4dc7d833c422e18
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-04 17:55:12 -05:00
Gil Pitney b465fbe312 cc3200: Enable device tree usage for CC3200
This patch ifdef's out information that would be redefined by
information generated from DTS.  This patch also fixes up the serial
drives to work properly with the DTS generated information.

Change-Id: I912ccf35be23c107705a4866e5a68b3b51154ffa
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 18:14:01 +00:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Gil Pitney 9bc293c827 cc3200: Use peripheral driver library functions from ROM
Previously, CC3200 drivers had two options to use the peripheral
driver library APIs:
1) Build driverlib SDK files in Zephyr, in ext/hal/ti/cc3200/*
2) Link directly with the driverlib.a, from an externally installed
   TI CC3200 SDK.

A new option is added to replace option 2), and is now the default:
3) Use the driverlib functions already provided in ROM.

This enables a savings in code size, which will depend on the
types of device drivers configured and the number of SDK
APIs actually used.

A rom_report build of the shell sample application showed
a savings of about 2kb in code space using this new config option.

Change-Id: Ie1ede6f7aacd23db20f5292e776f1dfeab5c7fe0
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-12 09:46:25 -06:00
Anas Nashif c1347b4730 kernel: replace all remaining nanokernel occurances
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.

Keep the legacy samples/tests as is.

Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Gil Pitney 8b93aaa229 cc3200: Move UART peripheral clock enable into soc init
Previously, UART clock enable was done in pinmux init.

This is now moved into soc initialization, along with other
power related initialization routines.

Change-Id: I1f9464655ad966e9caac2d238006f12a06b202ab
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-12-20 09:14:49 -06:00
Gil Pitney f18cced2c1 cc3200: Add a GPIO driver for the TI CC3200 LaunchXL
The pinmux configuration is done during board initialization.

This was validated using the following Zephyr apps:
 - samples/basic/blinky
 - samples/basic/disco
 - samples/basic/button

All 4 GPIO ports are supported.

Change-Id: If8599a23c1d56cfd678a6e2e5339f7e093c6061a
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-12-20 09:14:48 -06:00
Anas Nashif 92c5f91413 arm: systick: Some SoCs do not have systick
Make the systick feature optional that can be selected by the SoC.

Change-Id: I4a405640b84daecc17fc1882743d3cafb78ff861
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-27 19:39:26 +00:00
Gil Pitney 34849b2424 cc3200: Remove CPU_HAS_FPU from cc3200 Kconfig.soc
Though Cortex-M4 could optionally have a floating point unit,
the MCU in the cc3200 in fact does not have an FPU.

Enabling CPU_HAS_FPU caused applications built with CONFIG_FLOAT=y
to crash during an early call to enable_floating_point().

This patch was validated by running microPython, which is one
such application.

Change-Id: I8bfd42c456524e152cbbb983001d9540d93fbe98
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-11-14 20:05:18 -08:00
Andrew Boie 0b474eef9c kernel: deprecate old init levels
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.

New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.

Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.

Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-09 17:59:44 +00:00
Gil Pitney e8b43cbc81 cc3200: Add a UART driver (polled and interrupt modes)
The pinmux configuration is done during board initialization.

This was validated using the following Zephyr apps:
- samples/hello_world
- samples/philosophers
- samples/drivers/uart
- samples/shell

UARTA0 is currently supported.

Change-Id: I85727c622d4d42183cc9f2f8b43d653e245dd17e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-11-04 14:53:33 +00:00
Gil Pitney 385c7be8af cc3200: Add support for the TI CC32xx SoC Series
Initial support is for the CC3200 SoC, comprising a network coprocessor
and Cortex-M4 MPU.

This leverages the CC3200 SDK driver peripheral library, installed
separately, or built from ext/hal/.

Jira: ZEP-1109

Change-Id: I508afc8596c165b309a4ec641c39abadc779eea3
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2016-11-04 09:38:50 +00:00