Usage of K_SPINLOCK with CONFIG_DEBUG=y seems to trigger a compiler
warning about request not always being initialized. Fallback to
k_spin_lock/unlock calls to fix this issue.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
It is enabled by default if we enable device PM, but we do not want
this, otherwise we get linker errors (PM subsys, fun guaranteed!).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This patch introduces a new flag to indicate if a peripheral belongs
to FAST_ACTIVE1 domain. This way, pinctrl knows when to request the
SLOW_ACTIVE domain (where CTRLSEL multiplexer resides).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Rework Nordic specific S2RAM marking procedures.
The S2RAM marking procedures must not disrupt the stack due to
the TLS pointer not yet being initialized during their execution.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
The previous changes in
https://github.com/zephyrproject-rtos/zephyr/pull/74304
assumed that because this is also handled in
`bt_hci_transport_setup` that it shouldn't be done on
initialisation too.
However, if someone wants to develop their own app which
uses BT and also wants to enable the CPUNET by default this
KConfig should be available to them.
Signed-off-by: Sean Madigan <sean.madigan@nordicsemi.no>
The production version of the nRF54L15 SoC is now available, so remove
the initial Engineering A (EngA) preview version.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
New PDM, some present on nRF54L15 FP1, instances have
been added. Modified condfiguration file for nRF5340,
which now requires PDM0 instance.
Signed-off-by: Michał Stasiak <michal.stasiak@nordicsemi.no>
ETR handler (for Coresight STM logging) is using console UART and
can act as the shell backend. When that happens default serial shell
backend shall be disabled (and it is by default enabled if there is
a zephyr,console chosen set.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This is a follow-up to commit 7a2ce2882a.
Do not enable clock control by default on nRF54H Series SoCs when
the system timer is present, because clock control is not needed
for this purpose there.
Add missing `default y` in the CLOCK_CONTROL_NRF2 Kconfig option that
enables compilation of clock control drivers for nRF54H Series.
This way modules that actually require clock control (like drivers
that use radio) will be able to enable it using the generic option
(CLOCK_CONTROL), not the above one that is specific for nRF54H.
Update accordingly applications that referenced the CLOCK_CONTROL_NRF2
option.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Service for powering peripherals that use GPIO pins
in the global power domains:
- Active Fast
- Active Slow
- Main Slow
Signed-off-by: Rafal Dyla <rafal.dyla@nordicsemi.no>
nRF54H20 EngB is a re-label to the existing hardware revision for the
nRF54H20. nRF54H20 (whithout EngX) is becoming the final revision of the
SoC.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The new GRTC reading manner of the SYSCOUNTER uses hardware mechanism which
allows to keep it alive when any of CPUs is not sleeping. Otherwise
the SYSCOUNTER goes into sleep mode. Thus there is no
longer need to maintain the `CONFIG_NRF_GRTC_SLEEP_ALLOWED` symbol, however
if the user wants to have the SYSCOUNTER enabled all the time the
`CONFIG_NRF_GRTC_ALWAYS_ON` can be used instead.
The nrfx_grtc driver no longer provides the `wakeup-read-sleep` reading
manner.
Also setting the GRTC clock source is performed by the nrfx_grtc driver so
it has been removed from the `sys_clock_driver_init()` function.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Asserts are by default enabled for tests but flpr and ppr are
small cores (<64k) and many tests does not fit in memory with
asserts enabled.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Allows selecting the forward GPIO pins to network core Kconfig
option and enables it by default if the node exists in devicetree
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
- Added `cs-supported` property to nrf-radio devicetree
- Added `HAS_HW_NRF_RADIO_CS` Kconfig option which is set if
`cs-supported` property is enabled
- Enabled `cs-supported` property for nrf54-series devices
- Disabled `cs-supported` on nrf54l15bsim because it is not
yet supported
Signed-off-by: Ivan Iushkov <ivan.iushkov@nordicsemi.no>
Add the necessary entries but keep the usbhs disabled by default on
radio core (it is enabled by default on app core).
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Devicetree should be used instead. Example DT snippets are provided to
ease with the transition.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
VPR addresses are platform-dependent, so let's use a common symbol -
CONFIG_NRF_PLATFORM_HALTIUM - to cover both nRF54H and nRF92 series.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
PMIC service should be supported on Application and Radiocore, whereas
DVFS service is currently unsupported.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Booting VPRs requires changing the default value of CONFIG_RV_BOOT_HART.
This must be reverted (back to zero) for a future nRF9230 SoC revision,
which will align more closely with the RISC-V spec.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Production version of the nRF54L15 SoC needs reset reason
to be cleared before going into system off.
Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
Use generic hook infrastrucutre instead of custom Kconfig and hooks for
ARM.
Replace z_arm_platform_init() with platform_reset().
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In order to get all data from STMESP written to ETR and processed
on time we need to write dummy data before sleep.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add functions for local domain suspend to RAM. Add matching resume
procedure. Add pm_s2ram function for determining source of reset.
Add preserving NVIC and MPU state in retained RAM when CPU is powered off
during S2RAM procedure.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Use the correct define for checking if the DCDC converter shall be
enabled.
This resolves the opposite behavior where boards that enable the DCDC
converter uses the LDO and boards where LDO is used they enable the
DCDC.
Fixes: e189fb0720 ("soc: nordic: nrf52: add support for DT-based
regulators config")
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Add custom clock_control API for nRF platforms that allows requesting
clocks with specified minimal required attributes (accuracy, precision,
and frequency). Provide an implementation of this API for FLL16M, HFXO,
HSFLL, and LFCLK controllers in the nRF54H20 SoC.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
So far 10 kHz tick rate was used but it has 2 drawbacks:
- kernel timer precision is limited to 100 us which is worse compared
to 30 us on platforms which use RTC (which had 32768 Hz tick rate)
- GRTC has 1 MHz frequency so tick rate requires dividing by 100 during
timeout calculation. When 31250 Hz is used (which is 1000000 / 32)
then dividing can be done with bit shifting and it is faster (> 2 times
faster on Cortex-M33 and >8 times faster on VPR - RISCV).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add nrf5x binding header, as NRF5X_REG_MODE_DCDC is used in a macro
comparison. Missing header prevented evaluation to become true and so
enable DC/DC module.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The nRF9280 is a SiP (System-in-Package) consisting of the nRF9230 SoC
and additional components such as PMIC and others. Additionally,
the nRF9230 contains several CPUs, similarly to the nRF54h20 SoC.
Update nrfx glue, and add necessary Kconfig and initialization code
to allow building for nRF9280 targets: CPU, Radio and PPR cores.
The nRF9280 is used for all user build targets and Kconfigs,
whereas the nRF9230 is used as the build target for the MDK.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Co-authored-by: Andreas Moltumyr <andreas.moltumyr@nordicsemi.no>
Move mpu_region.c to common folder, to re-use with nRF92.
Rename it to nrf54hx_nrf92x_mpu_regions.c to indicate
which product series it applies to.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Enable the driver using the standard mechanism used everywhere else in
the tree. It is possible here as it is a singleton, so there's no
dependency on nrfx instantiation magic.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Some new Nordic nRF SoCs are based on a common platform, named
'Haltium'. Introduce a selectable Kconfig option available for series to
flag they are part of such common platform. This will allow to easily
enable common code shared across all Haltium based products.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Instead of forcing users to provide this setting, allow to describe
which signals require CLOCKPIN enablement at device nodes. This is later
captured by the pinctrl macros and applied in the pinctrl driver. Note
that name has been adjusted to nordic,clockpin-enable to avoid confusion
with clock related settings.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
custom arch_cpu_idle and arch_cpu_atomic_idle implementation was done
differently on different architectures. riscv implemented those as weak
symbols, xtensa used a kconfig and all other architectures did not
really care, but this was a global kconfig that should apply to all
architectures.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Gerard Marull-Paretas