Commit Graph

14443 Commits

Author SHA1 Message Date
Anas Nashif 5fc80dce61 xtensa: dont set variant with gcc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-20 07:04:33 -04:00
Anas Nashif 3c27c46562 gitlint: check for subsystem in commit subject
Check that we have <subsystem>: <subject> in commit messages.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-19 20:04:08 -04:00
Tomasz Bursztyka 24715bc3a9 api/spi: Add EEPROM configuration bit
EEPROM read mode is a specific mode where the controller will TX a
command to the slave, and once done, will read as many bytes requested.
The gain relies in the controller generating all necessary dummy bytes
by itself to read data the from slave, it will only generate RX
interrupts. Thus reducing CPU work.
Obviously TX and RX buffers should be relevantly provided by the user.

If not supported by the controller, the driver can still work (it will
have to generate the dummy bytes) and thus -EINVAL should not be
returned for that configuration bit.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 649795a7cb drivers/spi: Handle SPI_HOLD_ON_CS in spi context through gpio
If CS is controlled over GPIO, it will be possible to keep the slave up
and running (though no transaction will be going on) using this
configuration bit.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 0938ccbbc1 samples/spi: Add a quick test for spi_release() API function
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka c2913ad025 drivers/spi: Handle ressource locking and release in DW driver
Again this is made as generic as possible through driver's
spi_context API.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 10c1e49f84 api/spi: Add 2 specific control bits for special use cases.
SPI_HOLD_ON_CS can be used to ask the SPI device to keep CS on, after
the transaction. And this undefinitely, until another config is used.
This will inhibate the gpio cs delay, if any. This might be useful when
doing consecutive calls on one slave without releasing the CS.

SPI_LOCK_ON is to be used with caution as it will keep the SPI device
locked for the current config being used after each transaction. This
can be necessary if one needs to do consecutive calls on a slave without
any olher caller to interfere.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka d9007a09f8 samples/spi: Add an asynchronous call test
This gives a quicke example on how to use SPI asynchronous calls with
kernel's k_poll API.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 587dd5d275 drivers/spi: Add support for async call in DW driver in a generic way
All is done through the generic spi_context driver's API as it will be
generic to all SPI drivers.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 761a1d9429 api: Add asynchronous call support to SPI API
Adding a struct k_poll_signal parameter to driver's API unique
exposed function.

If not NULL, the call will be handled as asynchronous and will
return right after the transaction has started, on the contrary
of current logic where is waits for the transaction to finish
(= synchronous).

In order to save stack, let's move the device pointer to struct
spi_config. So the call is still at a maximum of 4 parameters.

Adapting spi_dw.c and spi driver sample to the change so it still
builts.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka b9838475ac drivers/spi: Handle synchronous calls in a generic manner in DW driver
All SPI drivers have this same way to handle synchronous call, thus
let's generalize it in struct spi_context, with a relevant API and apply
the change into SPI DW driver.

spi_context API will prove to be useful once asynchronous call will be
handled as well, through the same completion functions used now only for
synchronous call. It will be transparent for the driver.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 0bd83d21f2 drivers/spi: Add reentrance support to DW driver in a generic manner
Let's improve common SPI driver context by adding a lock and generic
function to get/release it.

It's statically initialized to save a bit of ROM.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka cd54dc66f2 samples: Add an SPI driver test application
This application intents to test an SPI driver by looping over MISO/MOSI
line where the controller will then send data to itself.

It will test various buffer tx/rx schemes.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 19b36aea0c drivers/spi: Adapt DW driver to new SPI API
Introducing as well a generic driver helper for CS gpio control and
buffer management.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka dd0c35919b api: New SPI API
Such API improves many aspects of the former API by reducing the number
of function, allowing more buffer flexibility etc... This leads in
better memory usag and performance as well.

However, as this will take sometime to get into use, the former API is
still present and is the one enabled by default.

Jira: ZEP-852
Jira: ZEP-287
Jira: ZEP-1725

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 62941365b0 arch/x86/quark_se: Let the possibility to use native SPI driver
Set the right definitions to be able to use SPI_DW instead of SPI_QMSI.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Tomasz Bursztyka 18991a2781 drivers/spi: Apply syntax rules on DW drivers
One liners if/for/while statements still need {}
(and line break are cheap for clarity).

Aligning parameters properly.

Also, removing __func__ usage from SYS_LOG_* as these macros already put
it internally.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2017-05-19 18:52:25 -04:00
Anas Nashif 96def63f10 xtools: get rid of warnings about wrong path
Eliminate following errors:

make[2]: /home/nashif/Work/sdk/xtools/outdir/x-tools//bin/-gcc: Command
not found
make[2]: /home/nashif/Work/sdk/xtools/outdir/x-tools//bin/-gcc: Command
not found
make[2]: /home/nashif/Work/sdk/xtools/outdir/x-tools//bin/-gcc: Command
not found

Also, usage of CROSS_COMPILE with a predefined toolchain is not required and
complicates things, just call CROSS_COMPILE with the full path if you
want to build with a toolchain not supported with Zephyr.

Change-Id: I93ec4ff2e04d22cee82c8e4b74b652927572b30a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-19 18:38:27 -04:00
Adithya Baglody 34ac008d0e drivers: pwm: remove deprecated PWM API usage.
Removed the old PWM APIs usage and added support for the new PWM API.

JIRA: ZEP-2018

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-19 18:38:01 -04:00
Anas Nashif 5fc31b8322 ci: use 0.9.1 SDK
This change moves to a project specific container with the latest SDK
which adds support for xtensa HALs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-19 18:26:39 -04:00
Piotr Mienkowski 36c0fddce7 drivers: eth_sam_gmac: Fix fragment ordering in RX
The data fragments were stored in reversed order when the RX
data was saved into network buffers. This was caused by net_pkt
changes in commit db11fcd "net/net_pkt: Fully separate struct
net_pkt from struct net_buf".

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-19 23:52:28 +03:00
Anas Nashif 3ba693fe03 doc: do not put version in breadcrumbs for daily docs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-19 16:38:21 -04:00
Andrew Boie 614db776dc libc: minimal: fix xtensa build
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-19 16:33:16 -04:00
Andrew Boie b1b58dc5ce bluetooth: at: enable CONFIG_SERIAL
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-19 16:33:16 -04:00
Carles Cufi d464929d2d build: Treat MSYS2 build as a UNIX build
Since MSYS2 provides a UNIX-like environment, treating it as a Windows
build caused issues with the paths.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-19 16:12:05 -04:00
Vinayak Kariappa Chettimada ed187ebccd Bluetooth: Fix auto PHY update on connection
Since the PHY update complete event can be generated due to the
procedure being initiated by the peer, use a flag to
differentiate between local auto update initiated on connection
complete versus peer initiated anytime in the connection. This
is necessary to avoid repeated initiation of auto-update
procedures intended only to be issued on connection complete.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-19 20:01:34 +03:00
Anas Nashif ce881890e3 arc: em7d/em9d: fix typo in soc flags
fixed typo: mnormm -> -mnorm

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-19 11:09:42 -04:00
Carles Cufi c698956039 doc: getting_started: Remove legacy MinGW instructions
MinGW is old and unsupported, and it does not even download properly
these days. Remove the instructions that rely on MinGW since they are
only confusing for people trying to build on Windows.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-19 10:15:57 -04:00
Neil Armstrong a9183cd518 flash: Rework and add flash device support for STM32L4x SoCs
The STM32L4x SoCs embeds a slightly different embedded flash controller
from the STM32F4x SoCs.

This particular controller has the following properties :
 - Up to 2 512KiB banks divided in 2KiB pages
 - Flash can be accessed in any sizes
 - Flash must be written in 64bit aligned 64bit double-words

The drivers/flash/flash_stm32f4x.c is refactored into a new common
drivers/flash/flash_stm32.c and drivers/flash/flash_stm32l4x.c is
created with the STM32L4x specific functions.

To ease the refactoring and keep common functions, the STM32L4x flash
headers are slightly modified to match the hardware reference naming
and solve compilation issues.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00
Neil Armstrong 7a8452c38b flash_stm32f4: bits were badly unset in erase and write functions
A typo was present ion the erase and write function were bit were
uncorrectly unset but all other bit except the mask were unset.
The code still worked because the two typos fixed themselves.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00
Neil Armstrong 6da68d214e flash_stm32f4: RDERR is not present on STM32F407
The RDERR bit is not present on F4x5 and F4x7 SoCs, so only use it when
available in the HAL.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00
Piotr Mienkowski ba50782db2 drivers: uart_sam: Configure TX pins for SAME70 only
Limit visibility of configurable TX pins to SAME70 series only.
Previously visibility of configurable SAME70 TX pins extended
to the full SAM family.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-19 10:06:48 -04:00
Piotr Mienkowski 77a88da4fc arch: same70: hide soc.h defines from assembler
Neither ASF nor CMSIS provide defines that can be processed by
the assembler. Exclude those from soc.h. Before this was done
incorrectly in board.h file.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-19 10:06:48 -04:00
Kumar Gala 974dfb5caa arm: board: Cleanup stm32f4_disco & stm32l496g_disco defconfig
Removed CONFIG_HAS_DTS from the stm32f4_disco_defconfig &
stm32l496g_disco_defconfig files as its automatically selected for all
ARM SoCs at this point.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Kumar Gala 8fa523badb arm: mps2_an385: remove setting of baud rate in defconfig
We now get the baud rate for the serial port from the device tree so we
don't need to be setting it in the defconfig.

The baud rate changed from 38400 to 115200 when we introduced the device
tree for MPS2.  The default baud rate was based on matching mbed, but we
use 115200 to match the standard default we have for most boards now.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Piotr Mienkowski ee66ee6c34 arch: sam3x: Use ASF library
This patch converts Atmel sam3x MCU series to use register
header files from Atmel Software Framework (ASF) library.
By using ASF different Atmel SAM MCU series can use common
device drivers.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-19 10:06:48 -04:00
Piotr Mienkowski 05d0726daf arch: atmel_sam: enhance gpio driver to support sam3x
This patch adds support for remaining Atmel SAM MCU series,
like sam3x to the common GPIO driver. After this update
full SAM MCU family should be supported by the driver.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2017-05-19 10:06:48 -04:00
Erwan Gouriou 607fd149ec dts: stm32f4: rework family tree
This commit rework stm32f4 series dtsi files hierarchy.
stm32f4.dtsi was used as maximum common set of IP while it should
be considered as the minimum common subset.
Then, following on stm32f4 series hierarchy and inheritance rules,
stm32f4xxx.dtsi files are reworked to include the "parent" soc dtsi
file and then add own IPs to each SoC.

Change-Id: I394278c84a8ea38921f9f143f4fc52ef1c645d05
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-19 10:06:48 -04:00
Erwan Gouriou 333f1bcf68 dts: stm32: rename uart generic node name to serial
In stm32 dtsi linux files, uart generic node name is serial.
Rename uart node names of stm32 dtsi files from uart@ to serial@

Change-Id: Iac5cbf7955f23cee520bc1790b0f324a17bfcf9e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-19 10:06:48 -04:00
Erwan Gouriou 3591cff67b dts: stm32: uart nodes were missing yaml description
This commit fixes uart only nodes situation for stm32 devices.
st,stm32-uart yaml description is added to enable compilation

Change-Id: Iea78693bdfb90fbb09612b75685ed7ca0ccca6d6
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-19 10:06:48 -04:00
Erwan Gouriou bb5e3e3e8f board: stm32f469i_disco: fixup to compile uart
Fix copy/paste issue that block compilation on stm32f469i_disco

Change-Id: If8ab1087ad67274c67c91edf47980d333bf612c1
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-19 10:06:48 -04:00
Neil Armstrong 4a6ba84f67 boards: arm: Add support for STM32F469I-DISCO
Add board configuration, dts and pinmux based on the stm32f4_disco
board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00
Neil Armstrong 2ea6300f21 stm32f4: Add support for STM32F469XI
Add configuration, dtsi and memory configuration fixup for the
STM32F469XI High Performance SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-19 10:06:48 -04:00
Kumar Gala 721919a61d arm: dts: Add zephyr,console to missing device trees
The chosen property that sets which serial port is being used for the
console device wasn't set.  Add the property "zephyr,console" to the
Arduino Due, CC3200-LaunchXL, CC3220SF-LaunchXL, and QEMU Cortex M3
boards.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Maureen Helm c3321b5918 doc: Update NXP board docs for pyOCD and Segger J-Link
Now that NXP boards support 'make flash' and 'make debug' via pyOCD and
Segger J-Link, update all the NXP board docs accordingly. Adds a new
generalized OpenSDA document so certain details don't have to be
repeated for every OpenSDA board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-05-19 10:06:48 -04:00
Kumar Gala 983e6a56fb arm: atmel: sam3: dts: use label to generate Atmel SAM3 uart name
Now that we can utilize label in the device tree we can convert to
getting the device name for the Atmel SAM3 UART out of the device
tree instead of from Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Kumar Gala 22874ef301 arm: ti: stellaris: dts: use label to generate TI Stellaris uart name
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI Stellaris UART out of the device
tree instead of from Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Kumar Gala f13af29741 arm: ti: cc32xx: dts: use label to generate TI CC32xx uart name
Now that we can utilize label in the device tree we can convert to
getting the device name for the TI CC32xx UART out of the device
tree instead of from Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Kumar Gala d88d4f90a5 arm: cmsdk_apb: dts: use label to generate ARM CMSDK APB uart name
Now that we can utilize label in the device tree we can convert to
getting the device name for the ARM CMSDK APB UART out of the device
tree instead of from Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00
Kumar Gala a746bcd56d arm: nxp_kinetis: dts: use label to generate NXP Kinetis uart name
Now that we can utilize label in the device tree we can convert to
getting the device name for the NXP Kinetis UART out of the device tree
instead of from Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-19 10:06:48 -04:00