Commit Graph

32 Commits

Author SHA1 Message Date
Patrik Flykt 4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Flavio Ceolin b82a339813 kernel: init: Add nop instruction in main
The main function is just a weak function that should be override by the
applications if they need. Just adding a nop instructions to explicitly
says that this function does nothing.

MISRA-C rule 2.2

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-12-14 13:17:36 +01:00
Flavio Ceolin 67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Yasushi SHOJI 064608b429 include: remove unused macros from include/arch/*/arch.h
All architecture defines OCTET_TO_SIZEOFUNIT and SIZEOFUNIT_TO_OCTET
as identity functions. But the only user is tests/benchmarks/app_kernel.
It's effectively a no-op.  Remove them.

Signed-off-by: Yasushi SHOJI <y-shoji@ispace-inc.com>
2018-06-20 12:07:59 -04:00
Savinay Dharmappa 8f908f38e0 dts: nios2f: Add device tree support
Add device tree support for nios2f soc

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-17 14:09:15 -07:00
Andrew Boie 8eaff5d6d2 k_thread_abort(): assert if abort essential thread
Previously, this was only done if an essential thread self-exited,
and was a runtime check that generated a kernel panic.

Now if any thread has k_thread_abort() called on it, and that thread
is essential to the system operation, this check is made. It is now
an assertion.

_NANO_ERR_INVALID_TASK_EXIT checks and printouts removed since this
is now an assertion.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:35:16 -07:00
Andrew Boie 74afcb67ae arches: move _NanoFatalErrorHandler defintion
This needs to be in <arch/cpu.h> so that it can be called
from the k_panic()/k_oops() macros in kernel.h.

Fixes build errors on these arches when using k_panic() or
k_oops().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-18 09:34:23 +03:00
Andrew Boie cdb94d6425 kernel: add k_panic() and k_oops() APIs
Unlike assertions, these APIs are active at all times. The kernel will
treat these errors in the same way as fatal CPU exceptions. Ultimately,
the policy of what to do with these errors is implemented in
_SysFatalErrorHandler.

If the archtecture supports it, a real CPU exception can be triggered
which will provide a complete register dump and PC value when the
problem occurs. This will provide more helpful information than a fake
exception stack frame (_default_esf) passed to the arch-specific exception
handling code.

Issue: ZEP-843
Change-Id: I8f136905c05bb84772e1c5ed53b8e920d24eb6fd
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-04-22 10:31:49 -04:00
Kumar Gala cc334c7273 Convert remaining code to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies.  We also convert the PRI printf formatters in the arch
code over to normal formatters.

Jira: ZEP-2051

Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 11:38:23 -05:00
Kumar Gala 789081673f Introduce new sized integer typedefs
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t.  This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.

We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.

We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.

Jira: ZEP-2051

Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-20 16:07:08 +00:00
David B. Kinder 2e5d517ee4 spell: fix comment typos: /include/arch/*
Scanning for typos in comments and strings.

Change-Id: I3d4db89e0824959252c79c19baa50028354247bd
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-04-18 16:22:55 -07:00
Anas Nashif d7bc60f096 kernel: remove remaining microkernel references
Change-Id: Ie648dbaaf714316c21395bd43e555618013dbd19
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-04-10 20:21:05 +00:00
Andrew Boie e08d07c97d kernel: add flexibility to k_cycle_get_32() definition
Some arches may want to define this as an inline function, or
define in core arch code instead of timer driver code.
Unfortunately, this means we need to remove from the footprint
tests, but this is not typically a large function.

Issue: ZEP-1546
Change-Id: Ic0d7a33507da855995838f4703d872cd613a2ca2
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-16 19:27:59 +00:00
Andrew Boie c99c686b2c nios2: use gen_isr_tables mechanism
Change-Id: If1ffcedf86a015789b42e7aec45dae3cc58f74fa
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:28:00 +00:00
Andrew Boie 164ba8c5cd sw_isr_table.h: clean up definition
This private data structure now no longer introduces a typedef or
uses CamelCase. It's not necessary to specify the size of extern
arrays, so we don't need a block of #ifdefs for every arch.

Change-Id: I71fe61822ecef29820280a43d5ac2822a61f7082
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-08 18:14:37 +00:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif ea8c6aad24 kernel: remove last nanokernel ocrrurances from include/
Jira: ZEP-1323
Change-Id: I32e2dc33406a74c2e592bb2df215bd9170bf286d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Andrew Boie bba445b31f nios2: fix irq_lock/unlock ordering bug
Memory accesses could be reordered before an irq_lock() or
after an irq_unlock() without the memory barriers.

See commit 15bc537712 for the
ARM fix for a complete description of the issue and fix.

Change-Id: I1d96fe0088d90150f0888c2893d017155fc0a0a7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-12-03 00:05:24 +00:00
Andrew Boie 325cae5c94 kernel: remove lingering irq_connect_dynamic() references
This API no longer exists.

Change-Id: I724bee8c0ebfbbe2d47c00c7645977d817bbcd36
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-23 15:36:51 +00:00
Andrew Boie 0b6c4febf1 nios2: get CPU features from ALT_CPU_* namespace
NIOS2_* namespace is deprecated.

Change-Id: I5a9b07ee33b20aa18509e9d789837f48199ab25d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-12 18:09:53 +00:00
Andrew Boie 71e22620a8 nios2: define vaddr_t and paddr_t
Change-Id: I09b91159b4c30876026fe7ae32109afb9164332d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-30 12:10:43 -07:00
Andrew Boie 7511a4f606 nios2: exceptions: remove remaining muldiv references
We are not going to handle unimplemented math instruction
exceptions at runtime. Remove remaining comments and exports
related to this. We don't need to leave a gap in the exception
stack frame for it either.

Change-Id: I4f1f3980a0e43bbf6f2f7488a9182f7acb06be05
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-29 05:23:55 +00:00
Andrew Boie a1c71b2043 nios2: include required macros for byte addressing
These are no-ops since this is not an arch that isn't byte-
addressable.

Change-Id: I09b0fd8b8d85f67bcca2dcb6ebc35843c19afa45
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-23 05:37:32 +00:00
Andrew Boie 738dec483e nios2: add static interrupt handling code
Supports Internal Interrupt Controller only for now; EIC
supoort tracked in ZEP-258.

Change-Id: I2d9c5180e61c06b377fce4bda8a59042b68d58f2
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 16:42:21 +00:00
Andrew Boie e2ff2fdd91 nios2: add base exception handling code
Change-Id: I56b0ec1a3576a77ca7bd6f2c0217de8053406927
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 16:42:20 +00:00
Andrew Boie 7bd697b0d5 nios2: add _nios2_reg_write/read functions
The technical manuals and example HAL code frequently refer to
register bank numbers from some base address. Add these helper
functions to read and write registers correctly using this
notation.

Change-Id: Ia082f5cc89081fcea2cb6ad8204c1b9b2650d3fd
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 16:42:19 +00:00
Andrew Boie 01724d319d nios2.h: cleanup API
This header was pulled in verbatim from Altera HAL and had
some style and naming issues. The inline functions or macros
which read registers can now be used in expressions.

Change-Id: I7a463717051efd2f9dd36e8a84d357852fbf9215
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-10 15:22:41 +00:00
Andrew Boie 7ff96dc4a4 nios2: implement _arch_irq_lock / unlock
Change-Id: I16fd64577f45db9531dd0d472279c255c5b8ff13
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:29 +00:00
Andrew Boie cfe645cef3 nios2: add config-independent CPU defines
This file is taken verbatim from the Altera Nios II HAL
source and includes various useful processor defines
and macros.

Change-Id: Idbf0b49bebe33bb5a53f5155d927bafadda9a2fe
Origin: nios2.h Altera Nios II HAL
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:28 +00:00
Andrew Boie 8564875a98 nios2: provide and include soc-specific headers
BSP builds for Nios II generate a linker.h and system.h which reflects
the configuration for that CPU. This can vary depending on how the CPU
is wired up in QSYS, so it needs to be at the SOC level--we essentially
treat any given CPU configuration as a SOC in Zephyr build terms.

Include these files from <arch/cpu.h>.

Change-Id: I12f76600107fec1a14a2f9cb82b0f55915ec03a6
Origin: Altera Quartus tools, machine generated
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:28 +00:00
Andrew Boie 7f7337a0fe nios2: fatal: add _SysFatalErrorHandler and _Fault stub
ZEP-252 will handle implementation of the code here.

Change-Id: I3e9a6c7cdf2d5a3b0240317b772628fead528095
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:27 +00:00
Andrew Boie 9433895954 nios2: basic build, non-functional
Basic build framework for Nios2. Everything is stubbed out,
we just want to have a build going so that we can start to
parallelize implementation tasks.

This patch is not intended to be functional, but should be
able to produce a binary for all the nanokernel-based
sanity checks.

Change-Id: I12dd8ca4a2273f7662bee46175822c9bbd99202a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-03 23:18:45 +00:00