Commit Graph

4 Commits

Author SHA1 Message Date
Anas Nashif d9825257f0 boards: testing: limit default platforms to those we can run
The idea of having default platforms is to prioritize running tests over
just building them. We do not have NSIM in CI and thus we are just
building for those platforms without running the tests, so, we spend
lots of time building on PRs which slows everything down. This is
already done in the daily builds.

We now have Qemu covering ARC. If we can get NSIM into CI, then we
should reconsider enabling some NSIM platforms.

Leaving hs_smp and _sem for coverage, we do not have other platforms
covering those.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-06-08 11:46:21 -04:00
Eugeniy Paltsev 1050945d2b ARC: boards: nsim: adjust default testing for better coverage
As of today the build-only testing in upstream is enabled for
nsim_em and nsim_em7d_v22 which are very similar from the
compiler POW. The ARC HS, ARC Secure EM and SMP targets miss
any testing.

So adjust default testing for better coverage by enabling
build-only testing for nsim_hs, nsim_sem and nsim_hs_smp and drop
excessive testing for nsim_em7d_v22.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-26 15:32:28 -04:00
Wayne Ren 53e1d9866f ARC: board: nsim: enable metaware toolchain in sanitycheck
Enable MWDT toolchain in sanitycheck for all ARC nSIM boards

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-05 10:22:56 -05:00
Alexey Brodkin 61f073a735 board/nsim: Add support of ARC HS cores in nSIM
ARC nSIM simulates pretty much any modern ARC core,
moreover it emulates a lot of different core features so
it is possible to play with them even wo real hardware.

Thus we add yet another ARC core family to be used on simulated
nSIM board.

For now it's just a basic configuration with ARC UART for
smoke-testing of Zephyr on ARC HS CPUs.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-07-31 09:25:15 -07:00