Commit Graph

6 Commits

Author SHA1 Message Date
Chuck Jordan 77286b3143 arc: Set __start entry point to be same as __reset
There is a BUG here in that the alias for __start was
aliased to the start of the vector table. Yet, on ARC CPUs,
the vector table CANNOT be the entry point, because there
is no code in a vector table. Only addresses appear in each vector.
Thus, the reset vector, at offset 0 in this table, is a raw address.
The top Makefile in zephyr sets the lable __start to be the entry point
like this: -e __start. Debuggers, for example, use this entry point
to know where the first line of code is.

Also, in KConfig, there were duplicate NSIM blocks. One has been
removed.

Change-Id: I480be7d338a8b45b8ea6ef3f55ac2e6c43829452
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-05 22:12:56 +00:00
Andrew Boie 377f616b3c arc: fix alignment of IRQ vector table
On ARC the IRQ and exception vectors are just one big array of
function pointers placed at the very beginning of the binary in ROM.
Vectors 0-15 are for CPU exceptions, 16-255 for interrupts.

In Zephyr these have been logically split into an execption table
followed immediately by the IRQ table, specified in the ARC linker.cmd.
However, the exception vector table defined in Zephyr had only 14
entries so the IRQ table was misaligned by 8 bytes. This went undetected
for some time as in the default configuration every entry in the IRQ
table pointed to the common demux function _isr_enter().

This patch correctly ensures that the IRQ table begins at address
0x40000040 instead of 0x40000038 like it had been.

Change-Id: I3b548df0dcabeb9d986ecd6a41e593bd02e3bd73
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:13 -05:00
Anas Nashif 275ca60b08 Fixed file description and applied doxygen style
Removed old style file description and documnetation and apply
doxygen synatx.

Change-Id: I3ac9f06d4f574bf3c79c6f6044cec3a7e2f6e4c8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:58 -05:00
Dan Kalowsky da67b29569 checkpatch: warning - block_comment_style
Change-Id: I6da43e41f9c6efee577b70513ec368ae3cce0144
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:33 -05:00
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Anas Nashif fc3f76d751 arc: move source files to core/
Change-Id: Ic30b2579098a54ff7ab777d9d167ab58bf08ad93
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:58 -05:00