Commit Graph

1 Commits

Author SHA1 Message Date
Erwan Gouriou 93c005de3e dts/arm/st: Add stm32u5 base and initial device
Add initial basic description for Cortex-M33 based
stm32u5 soc series.
This encompass description for base nodes, such as:
- cpu
- flash
- clocks
- sram

Additionally, provide description for variant stm32u575Xi.

Related to clocks nodes, added bindings for stm32u5 specific
rcc node as well as msi and pll clocks.

Header file stm32_clock_control.h was also updated to support
these new bindings.
Note that for compatibility with existing definitions, clock
node describing main pll clock, known as "PLL1", was given two
labels: "pll" and "pll1".

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-29 07:28:32 -05:00