Commit Graph

12 Commits

Author SHA1 Message Date
Erwan Gouriou 0c397c7b34 boards: stm32: fix default HSI clock configuration
To avoid configuration surprises, replace
CONFIG_CLOCK_STM32_PLL_SRC_HSI
with
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
No impact today, but could depend on tools.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-12-14 08:52:20 -06:00
Kumar Gala 65e72be8f7 devicetree: Generate CONFIG_UART_CONSOLE_ON_DEV_NAME from dt
We can use the chosen property "zephyr,console" to determine what uart
should be used as the console and find its name to generate a define for
CONFIG_UART_CONSOLE_ON_DEV_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-07-11 12:09:10 -05:00
Michel Jaouen e00b2be6a5 boards: nucleo_l476rg: enable MPU
Signed-off-by: Michel Jaouen <michel.jaouen@st.com>
2017-06-23 15:05:10 -05:00
Erwan Gouriou 9413c8ba4d stm32: clean up after completion of transition to ll Clock control
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-06-02 14:11:13 -04:00
Kumar Gala 26811defc7 arm: dts: Cleanup HAS_DTS
Now that all ARM platforms have a device tree we can move selecting of
HAS_DTS up and remove any !HAS_DTS cases, as well as setting in all the
defconfigs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-15 13:22:54 -04:00
Erwan Gouriou 19a91c0272 soc: stm32l476rg: rename SOC config flag
Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)

Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-15 13:22:54 -04:00
Kumar Gala df21ab8541 dts: arm: ST: Cleanup DTS bits on STM32L4 SoCs
Since all the L4 SoCs are using DTS we can remove the various Kconfig
bits that we now get from DTS.

Change-Id: Icdec49b478ff285dc3347b09412964a721f75bbf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-14 05:56:53 -05:00
Erwan Gouriou 3c389b54f0 clock control: clean up after stm32cube LL driver
After introduction and activation of STM32Cube LL based driver on
F3 and L4 series, this commit removes the no more needed code for
native driver for these soc.

Change-Id: I266d1a3fc4b464cee34b1cc1a1a333c5bf923e41
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 56b526c3a3 boards: nucleo_l476rg: enable support of LL Cube clock control driver
Activate support of LL Cube based Clock control driver
Note that prescaler should now use actual numerical value used
for calculation and not register value (hence 1 instead of 0)

Change-Id: Ia3a26bffbd470c6e958fd2ca82b8eb071beb6ca8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 1e92c22a13 nucleo_l476rg: Enable device tree usage for Nucleo
This patch adds all the necessary changes to enable use of DTS for
generating required build information.

Change-Id: Ia476fbb14c7d9d6b9db3340c73f599556a880da3
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 18:14:02 +00:00
Erwan Gouriou 21c362e081 board: configure pwm support on ST Nucleo boards
Change-Id: Iaad4644e901729b2353daddbf6e3f402370541fb
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 10:31:46 -06:00
Neil Armstrong afe71f61e7 nucleo_l476rg: add board support
Add board support for the Nucleo64 L476RG development board.

Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2016-12-06 10:31:45 -06:00