Add some simple depends so we limit various I2C drivers to the SoC
families that the drivers are relevant to.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On I2C V1 parts, LL_I2C_EnableIT_TX() translates to EVT and BUF
IRQ enabling.
In stm32_i2c_msg_write function, LL_I2C_EnableIT_TX is called right
after stm32_i2c_enable_transfer_interrupts which already enables BUF
IRQ, which starts the transfer.
As a consequence it could happen that transfer is already complete
at the time LL_I2C_EnableIT_TX is called. This case is not expected
by remaining part of the code which loops forever waiting for BUF IRQ
to be raised.
Remove the superfluous LL_I2C_EnableIT_TX call.
Fixes: #32265
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The callback pointers for uninitiated operations are implicitly null;
making them explicit only confuses maintainers searching for drivers
that implement the API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This CL prevents the transaction result overwritten by the recovery
function. Even if the recovery mechanism succeeds, the upper layer still
needs to know why the transaction failed.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Since all fields' type in SMBST is R/W1C and RO, setting a single bit to
clear a specified event is a more suitable solution. Or we might clear
the other pending bits that occurred at the same moment unexpectedly.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL reset i2c event-completed semaphore before starting
transactions. Some interrupt events such as BUS_ERROR might change its
counter when i2c bus is idle. It causes that the driver cannot wait
for the event completed and return immediately.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Remove conditionals (PM_DEEP_SLEEP_STATES and PM_SLEEP_STATES) from
power management code. Now these features are always available when
power management is enabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The default configuration is made to be "master" at
"standard speed". This makes it possible to use the
driver without having to configure it.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Enable slave support for I2C device instances. Slave mode is
interrupt based, wheras master mode is still based on polling.
Remove ENI bit in master configuration since it is not needed for
master mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Introduce a Kconfig variable that the SoC can set to indicate the
number of instances in Device Tree. This also fixes the accuracy of
the Elkhart Lake instance count where the code was previously assuming
up to 12 instances even though DT lists 15 nodes.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move all PCIe-based DT nodes under a PCIe bus and take advantage of
the DT_ANY_INST_ON_BUS_STATUS_OKAY() and DT_INST_ON_BUS() macros.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit add support for i2c on imx6sx.
I2C support is based on imx7d and requires NXP HAL.
The Device Tree binding is also changed to better reflect that i2c
driver support both imx6sx and imx7d.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
This commit is about the it8xxx2 i2c master driver which
includes six SMBus channels. The enhanced channel i2c3,
i2c4, i2c5 are controller which are designed to support
the I2C protocol.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Now that we generate a header that extern's all possible devicetree
based device struct we can remove DEVICE_DT_DECLARE and
DEVICE_DT_INST_DECLARE as they aren't needed anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Disable RTC WDT enabled (by default) by 2nd stage bootloader in ESP-IDF.
This WDT timer ensures correct hand-over and startup sequence from
bootloader to application.
Enabling bootloader caused system clock initialization to fail
when clock rate is greater then 80MHz. This also fixes
esp32 clock source code.
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
Since the PU power rail of i2c bus might be gone at the initial state
after ec powered up, we might have no chance to get STOP condition. This
is because no i2c transactions occurred before its power rail is
restored. But it's crucial to reset the whole i2c module after i2c bus
is back to the idle state.
The original test suite for i2c recovery mechanism didn't consider this
case that initial i2c bus is low before ec powered on. Hence, this CL
fixed this symptom by:
1. Force i2c modules must proceed 'reset' step no matter we received
STOP condition or not.
2. Use Boolean for condition check to prevent misusage and meet MISRA.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The NPCX SMB modules provides full support for a two-wire SMBus/I2C
synchronous serial interface. Each SMBus/I2C interface is a two-wire
serial interface that is compatible with both Intel SMBus and Philips
I2C physical layer. There are 8 SMBus modules and 10 buses in NPCX7
series.
In NPCX7 series, the SMB5 and SMB6 modules contain a two-way switch to
support two separate SMBus/I2C buses (ports) with one SMB module
(controller) Please refer Section 4.7.2 in the datasheet. In order to
support it, this CL seperates the i2c driver into port and controller
drivers. The controller driver is in charge of i2c module operations
and internal state machine. The port driver is in charge of pin-mux
and connection between Zehpyr i2c api interface and controller driver.
All of modules have separate 32-byte transmit FIFO and 32-byte receive
FIFO buffers. These FIFO buffers reduce firmware overhead during long
SMBus transactions by allowing the Core to write or read more than one
data byte at a time to/from the SMB module.
The CL also includes:
— Add npcx i2c port/controller device tree declarations.
— Zephyr i2c api implementation.
— Add "i2c-0" aliases in npcx7m6fb.dts for i2c test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add an additional 4 ports for upcoming Arm based server that will have a
total of 12 I2C ports.
Similar to the original 8 ports, these additional 4 ports will not be
enabled unless specified at configuration time.
Signed-off-by: Dan Kalowsky <dkalowsky@amperecomputing.com>
This reverts commit cabbd916cf.
This is considered to be useful enough that it should be restored
as a stable Zephyr API.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The i2c controller reset sequence is revamped to address
i2c failures which require a reset. Also, more time is
given for i2c slave device to read data by waiting longer.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
imx_msg transmission size type is uint32_t:
changed imx_read and imx_write signature accordingly.
Removed also two unused variables.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
When there is no data to send (e.g. i2c message with NULL buffer and
len=0), i2c_imx driver locks itself in isr handling forever.
So if there is no data to send, only device's address must be written
on bus. This fixes i2c_shell's scan command on both imx7 and imx6sx.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
currently pcie_get_mbar only returns the physical address.
This changes the function to return the size of the mbar and
the flags (IO Bar vs MEM BAR).
Signed-off-by: Maximilian Bachmann <m.bachmann@acontis.com>
The SAM4L have a unique I2C driver. It shares simultaneously pins for
both master and slave controllers. Each controller have their own
instance. This introduces the TWIM controller that handles only the
master part.
The TWIM controller uses no copy and the driver was prepared to work
with both 7 and 10 bits address. The controller can handler up to 256
bytes for a single transfer allowing long data communication with
almost no CPU intervention.
The driver was wrote specifically to Zephyr. It receives a transfer
list of from upper layers to a specific device on the bus. It programs
the first and second transfer, if it exists, before start. At end of
full read/write interrupt, will program the next data block. This
process repeats until all transfers be executed. The driver uses
interrupt from TWIM to check for erros or program next tranfer.
Future work can enable low power mode on the driver allowing long
transfers with low power consumption.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Take advantage of the new pcie_alloc_irq() API so that we get a valid
IRQ on platforms where the IRQ register is not pre-populated with a
valid value up front.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Neither i2c_transfer in i2c.h nor i2c_mcux_transfer in i2c_mcux.c
have any sort of locking. If e.g. an i2c eprom is updated using a
shell and simultaneously another thread access a lm75 then one
of the two transfers will fail or produce a random result.
This changes addresses this issue by that all i2c_msgs of one
i2c_transfer are completed before allowing a subsequent transfer
to start.
The code has been validated on a FRDM_K64F.
Signed-off-by: Andreas Dröscher <github@anticat.ch>
For drivers that support CONFIG_DEVICE_POWER_MANAGEMENT there are some
cases that look like:
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
DEVICE_DEFINE()
#else
DEVICE_AND_API_INIT()
#endif
There is no need to special case this as the pm_control_fn argument to
DEVICE_DEFINE will just be ignored in the
!CONFIG_DEVICE_POWER_MANAGEMENT case. So we can cleanup the code a
little and remove the #else cases for the drivers that do this.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
This is to make the gpio-i2c initialization occur after the GPIO pin
clock initialization.
Signed-off-by: Cassini Zhuang <cassini.zhuang@hansonggroup.com>
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move pinctrl remap functions out of stm32f1 definition in order
to get it available to all series.
Allows use of more IS_ENABLED macros in calling drivers and make
code more readable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The only user of the I2C instances is the esp32 driver. Move the
Kconfig symbols down to the esp32 Kconfig for the instances it needs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to be in line with other DT_INST macros in zephyr code base,
swap the arguments order in following macro definitions:
*ST_STM32_DT_PINCTRL
*ST_STM32_DT_INST_PINCTRL
Update the users accordingly.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to pcintrl configuration using pcintrl helper
macros.
Pinctrl init sequence has to be done before bus_mutex initialization.
Driver dts bindings are updated to reflect usage of pinctrl-x
properties
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Described in ES096 2.14.7,
F101X8/B, F102X8/B, and F103X8/B
might not be able to enter i2c master mode on power-up.
Force reset help to mitigate this issue.
Signed-off-by: Yiyu Zhu <smallzzy@outlook.com>
Flavio Ceolin