This replaces the cc3220s_launchxl board with the cc3220sf_launchxl
board directory.
Jira: ZEP-1958
Change-Id: I550061319d458d6ba694dbf26082f14666dd150e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This follows the naming policy for the TI SoC, board part number,
and SoC family name:
<board> = cc3220s_launchxl
<soc> = cc3220s
<series> = cc32xx
<family> = ti_simplelink
Jira: ZEP-1958
Change-Id: I314bada45ce27d140ab69d05f37a5cd0409a987f
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Update the network applications section now that the http_server
and mqtt_publisher sample apps were merged.
Change-Id: I65dd568b7f92a1f7c89f7aa4f876f53a32ecb878
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
Ben and Al are spending most of their time on other projects.
Change-Id: Ic0e9182539ca9515a2b4b0d431637692d892d0c5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
I will look after this for the time being until we can
designate a fulltime maintainer.
Change-Id: I1b76a3a5657ef0c828e7012ad7828ccf7d2fda32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
ARM's Cortex-M Prototyping System (MPS2) is a board with an FPGA that
can be programmed with different 'SoCs'. To use these in Zephyr we need
a set of board files for each variant.
This adds a board for a variant which implements a Cortex-M3 CPU; the
naming of this matches that used for the Zephyr SoC (which is itself
based on ARM's documentation nomenclature).
Change-Id: Ie02a67a03016b8aeee31e3694f0edbcc37f9ee64
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
ARM's Cortex-M Prototyping System (or MPS2) [1] is a board containing
devices such as RAM, ethernet and display, and at its heart there is an
FPGA which can be programmed with various 'SoCs' which implement the
CPU, SRAM, UARTs, SPI, DMA, etc. There are also software simulations of
systems based on this hardware which are part of ARM's Fixed Virtual
Platforms (FVPs).
All of the above could be regarded SoCs in the same series so we will
treat them as such in Zephyr.
In this initial patch we add SoC support for the public FPGA image
which implements a Cortex-M3 CPU, and includes definitions to support
use of the UARTs on this.
ARM's documentation for MPS2 images are titled 'Application Note ANnnn'
where the number nnn is different for each 'SoC'. E.g. Application Note
AN385 is for "ARM Cortex-M3 SMM on V2M-MPS2" [2]. The files ARM supply
for programming the board firmware also make extensive use of the ANnnn
nomenclature, so we will use this for the SoC name in Zephyr. E.g. the
Cortex-M3 SoC will be called 'mps2_an385'. Note, it is not possible to
use the CPU type (e.g. M3) for the name as there are multiple FPGA
images for some CPU types (e.g. there are three Cortex M7 images
with differing FPU and MPU support).
[1] https://www.arm.com/products/tools/development-boards/versatile-express/cortex-m-prototyping-system.php
[2] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0385c/index.html
Change-Id: Ice54f2d2cde7669582337f256c878526139daedd
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Previous MAINTAINERS patch using F: *.rst didn't work
so trying adding */*.rst */*/*.rst , etc. to see if
that works.
Change-Id: I0555b3ad2a2bf24cf0b9351860d7a85f6cc7627a
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Documentation used to be confined to the doc/ folder but can now
be stored elsewhere in the code tree (/boards and /samples in particular)
Adding *.rst to the DOCUMENTATION section of MAINTAINERS
Change-Id: I0c63c6ad3f92f4b5454736ee3bd292d2f2b46f63
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Includes for HCI drivers are found in include/drivers/bluetooth/.
Change-Id: I80ef8c60aa972f0f4d625c998dac5a3896fb2ab4
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.
Keep the legacy samples/tests as is.
Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Change the path to IP stack as it was moved from
net/ to subsys/net/
Change-Id: I6fee4939e9b4d137d0e1bd2ff98178e2c7c90959
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add board support for ARM V2M Beetle platform.
ARM V2M Beetle board is build around the ARM Beetle Cortex-M3
based processor.
The support has been tested in nanokernel mode with the bringup
application that will be pushed with a future patch.
Jira: ZEP-1245
Change-Id: Ib05a40c072f10149e692283177387cf2cfe32f66
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the path to Bluetooth subsystem documentation so the right
reviewers get added in gerrit for patches that modify the
documentation.
Change-Id: I0f8049989afbd955599eddd6f7623a0574f033c5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move controller code from drivers/controller to
subsys/bluetooth/controller.
Change-Id: I73f675188485aa3267507bad7647796e593a3da0
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Move the Bluetooth host stack from net/bluetooth to
subsys/bluetooth/host. This is preparation for having both host and
controller under the same root, i.e. subsys/bluetooth/.
Change-Id: I3bc796f7e331fca0c485f3890d62b9c03e027b96
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This follows the naming policy for the TI SoC, board part number,
and SoC family name:
<board> = cc3200_launchxl
<soc> = cc3200
<series> = cc32xx
<family> = ti_simplelink
This guides directory and file naming, and Kconfig variables:
- arch/arm/soc/<family>/<series>
- boards/arm/<board>
- ext/hal/cc3200sdk
- drivers/*/<driver>_<series>.c
Jira: ZEP-1109
Change-Id: I3db9553b2cd1f34f104a5d990de9e9417fcbb3df
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
Change-Id: I92b543022ae6103683cc9e16b925508fb3cf7db1
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Subsystems code will reside in subsys/ folder. This patch creates the
folder and moves FS code there.
Jira: ZEP-1120
Change-Id: If3b1bcb996c5fbd4056cd5d1920d41d29810d6b2
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Add a catch all for all architectures for their relevant board
directories so reviews, etc get covered/seen by the arch maintainers as
well.
Change-Id: Ib5a82039d7e8136bb73722df0a5edde0329726e8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change-Id: Ie8b35c433e96a5e6c840510586c383e31c6912c0
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The BLE core on the Arduino 101 is an nRF51822 QFAA (256kB flash, 16kB
RAM).
Change-Id: Ia802b3eb634c0cd6775c4059c9569bccd915a578
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Introduce an architecture sorting of boards. This is to allow for
easier maintenance going forward as the number of boards grows. It
will be easier for any scripts to know the board/arch mapping without
having to maintain an explicit list of what boards are associated with
which arch. We can also do things like have architecture maintainers
cover reviews and branches for arch/${ARCH} and boards/${ARCH} going
forward.
Change-Id: I02e0a30292b31fad58fb5dfab2682ad1c5a7d5a7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Point to a new wiki page for the documentation. The old page can be removed
once this patch is committed.
Change-Id: I2b031bfffe10ec24c41c58d0754f2b14d95f5e53
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Anas Nashif