Commit Graph

4 Commits

Author SHA1 Message Date
Ulf Magnusson 3ec8dd5744 drivers: led_strip: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Tomasz Bursztyka ea2431f32f api/spi: Reduce parameter number on transceive function
tx_bufs/tx_count and rx_bufs/rx_count can be hold in another dedicated
structure, thus reducing the number of parameters to transceive. This
permits to avoid using the stack when calling transceive.

Since we saved parameters, we can expose back the struct device pointer,
to stay consistent with other device driver APIs.

Fixes #5839

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-04-04 19:02:35 +02:00
David B. Kinder 7e3ed1465f doc: fix Kconfig misspellings
Kconfig files are processed to create configuration
option documentation.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-11-08 13:50:35 -05:00
Marti Bolivar 669327137b drivers: led_strip: add WS2812-ish driver
The WS2812 LED driver IC has a one-wire interface which encodes bit
values as pulse widths.

The ICs themselves are basically shift registers. Roughly speaking, a
"short" pulse shifts in a zero bit, a "long" pulse shifts in a one
bit, and an inter-pulse gap exceeding a reset time threshold causes a
pixel to latch the shifted-in color values. Each chip has an output
pin for daisy chaining. Refer to the chip datsheets and comments in
Kconfig.ws2812 for more details.

To meet timing without hogging the core, this driver generates pulses
using SPI. To work, this requires the MOSI line to stay low between
SPI frames, and for inter-frame delays to be less than the reset pulse
time.

There are other ways do it (PWM + DMA on some SoCs, GPIO bit-banging
if no other tasks need the core), but this is a reasonably
general-purpose implementation.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-10-28 13:23:30 -04:00