3 Commits

Author	SHA1	Message	Date
Francois Ramu	48a2aedb78	soc: st: stm32h7rs serie requires specific power rails ... Enables the XSPIM2 rail when using GPIO bank N Enables the XSPIM1 rail when using GPIO bank O or P Enables the USBvoltage detector when using the GPIO M Signed-off-by: Francois Ramu <francois.ramu@st.com>	2024-10-11 13:16:43 -04:00
Anas Nashif	c6a03606c2	soc: st: move init code from SYS_INIT to hooks ... Replace SYS_INIT with SoC hooks and adapt SoC init code Signed-off-by: Anas Nashif <anas.nashif@intel.com>	2024-09-20 13:15:31 +02:00
Francois Ramu	4f995bd0ff	soc: arm: stm32h7RS introduce stm32h7R/h7S devices ... Add the new STM32HRSX serie with stm32H7R3, stm32H7R7, stm32H7S3, stm32H7S7 devices from STMicroelectronics Same MPU regions as stm32h7 device. Signed-off-by: Francois Ramu <francois.ramu@st.com>	2024-06-06 00:41:43 -07:00