Commit Graph

10 Commits

Author SHA1 Message Date
Andrew Boie 5e1ae08765 loapic: get rid of function call overhead for _loapic_eoi()
We generally call this in interrupt code, and since it's just a register
write, get rid of all the function call overhead.

Change-Id: I251fa3cee0841fcdd8eecc7941d4d3782d112e66
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie b43758d22a x86: remove dynamically generated IRQ and exception code
We are interested in supporting some XIP x86 platforms which are
unable to fetch CPU instructions from system RAM. This requires
refactoring our dynamic IRQ/exc code which currently synthesizes
assembly language instructions to create IRQ stubs on-the-fly.

Instead, a new approach is taken. Given that the configuration at
build time specifies the number of required stubs, use this
to generate a build time a set of tiny stub functions which simply
push a 'stub id' and then call common dynamic interrupt code.
The handler function and handler argument is saved in a table keyed by
this stub id.

CONFIG_EOI_HANDLER_SUPPORTED removed, the code hasn't been conditionally
compiled for some time and in all cases we call _loapic_eoi() when
finished with an interrupt.

Some other out-of-date verbiage in comments related to supporting
non-APIC removed.

Previously, when dynamic exceptions were created a pointer would
be passed in by the caller reserving ram for the stub code. Since
this is no longer feasible, two new Kconfig options have been added.
CONFIG_NUM_DYNAMIC_EXC_STUBS and CONFIG_NUM_DYNAMIC_EXC_NO_ERR_STUBS
control how many stubs are created for exceptions that push
an error code, and no error code, respectively.

SW Interrupts are no longer triggered by "int <vector>" hard-coded
assembly instructions. Instead this is done by sending a self-directed
inter-processor interrupt from the LOAPIC, using a new API
loapic_int_vect_trigger(). In this way we get rid of dynamically
generated code in irq_test_common.h.

All interrupts call _loapic_eoi() when finished, since this is now
the right thing to do for all IRQs, including SW interrupts.

_irq_handler_set() for x86 no longer requires the old function pointer
to be supplied.

Change-Id: I78993d3d00dd153c9051c518b417cce8d3acee9e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:41 -05:00
Andrew Boie 090385b666 x86: remove boi handler support, eoi argument
This was only needed for the older 8259A style PICs which are no
longer supported.

Since we now just support APIC, we always just call loapic_eoi which
no longer requires an argument and informs the IOAPIC that the interrupt
is complete if necessary.

Change-Id: I15c9b7b4f03b872656220af32220b62e043bfa6b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:35 -05:00
Dirk Brandewie ad5af93f25 x86: Add context value to loapic_mkstub and ioapic_mkstub macros
Add a context value to the ioapic and loapic mkstub macros to allow
the developer to specify a context value that will be passed on the
stack to the interrupt service routines.

All the invocations for the loapic_mkstub and ioapic_mkstub macros
have been changed to pass in 0 so there is no functional difference
ATM.  This change removes the need for drivers to have trampoline ISR
routines to pass a context vaule to their generic ISR routine.

This is the first step in getting rid of the hack where the driver
needs to look into the __initconfig_* linker objects.

Change-Id: I2c5eaa20d8cb5a42ef445762c426854be32c8452
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:24:31 -05:00
Dan Kalowsky 978851fb6a checkpatch: code_indent failures
Corrects the checkpatch code_indent failures

Change-Id: I2ff93b8907d3eddbaa543ccbd12aecef8af7f698
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-05 20:24:31 -05:00
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Dirk Brandewie be1b1a4e35 x86: move LOAPIC driver to device model/init system
Change the LOAPIC driver to be initialized directly from the init
system. The function signature of _loapic_init() function is updated
accordingly.

Change-Id: I5ed26d53524c8526d413a05ac9a7a58dd4264c5a
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:24:17 -05:00
Dmitriy Korovkin 6dd108a263 IRQ_CONNECT_STATIC implementation for x86 platform
In order to simplify x86 interrupt stub creation, each interrupt
controller implements an interrupt stub definition macro.

Add IRQ_CONNECT_STATIC() for static interrupt registration, and
construct the interrupt stubs name from device and interrupt
handler names.

Add IRQ_CONFIG() macro for the interrupt controller configuration.
On x86 platform it programs APIC to associate an IRQ number with
the interupt vector.

Add HPET_TIMER0_INT_PRI parameter to Quark platform header to
make it build correctly.

Change-Id: I24ad25e1aa807ffa63733a27ad882877fcad72af
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-02-05 20:14:25 -05:00
Dirk Brandewie 1a159cb3f5 loapic: Expose APIC LVT mask definition
When the local APIC timer driver is configured into the system it needs to
ability to enable/disable the local APIC timer. The definition of the
LVT mask bit was moved into the APIC interrupt driver as part of the
driver reroganization effort. Move the definition to the public header
file.

Change-Id: I8e7f8eab9f39aa17b96079836c182bde6f7b4fd1
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:00 -05:00
Inaky Perez-Gonzalez 8ddf82cf70 First commit
Signed-off-by:  <inaky.perez-gonzalez@intel.com>
2015-04-10 16:44:37 -07:00