Commit Graph

2466 Commits

Author SHA1 Message Date
Wojciech Bober 923560a959 drivers/timer: Rework the nRF RTC driver.
This is a reworked version of the previous RTC driver. The main
changed is related to the handling _timer_idle_exit() on non-RTC
wake-ups. The previous version didn't announce the elapsed time
to the kernel in _timer_idle_exit(). Additionally, the driver now
makes sure never to announce more idle ticks than the kernel asked
for, since the kernel does not handle negative deltas in its timeout
queues.

Change-Id: I312a357a7ce8f0c22adf5153731064b92870e47e
Signed-off-by: Wojciech Bober <wojciech.bober@nordicsemi.no>
Signed-off-by: Øyvind Hovdsveen <oyvind.hovdsveen@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-02-17 20:27:10 +00:00
Andrew Boie e08d07c97d kernel: add flexibility to k_cycle_get_32() definition
Some arches may want to define this as an inline function, or
define in core arch code instead of timer driver code.
Unfortunately, this means we need to remove from the footprint
tests, but this is not typically a large function.

Issue: ZEP-1546
Change-Id: Ic0d7a33507da855995838f4703d872cd613a2ca2
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-16 19:27:59 +00:00
Andrew Boie 09648cf8ec altera_avalon_timer: disable high-resolution timestamps
On Nios II the same timer peripheral IP block can't function
as a periodic system timer and a high-resolution timestamp source.
A second timer instance with different configuration is required.
Until that is implemented, just return the accumulated cycle count.

Issue: ZEP-1546
Change-Id: If3dcebdc60334bf3aa0ab45ccd82f1b2531b6bc1
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-16 19:10:19 +00:00
Andrew Boie 97d76cad66 riscv_machine_timer: fix k_cycle_get_32()
There are race conditions trying to coordinate the value between
the accumulated_cycle_count (updated at interrupt time) and
trying to compute the delta from the last interrupt using the
mtime registers. An unlucky call could result in the timestamp
appearing to move backwards in time.

the 'mtime' register isn't reset at every interrupt. Since we just
want a cycle counter, report its raw value.

Issue: ZEP-1546
Change-Id: I9f404b33214d6502fea47374fcf0ecbf84ef8136
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-16 19:08:04 +00:00
Lee Jones fe8d1bdedb dma: Introduce STM32F4x DMA driver
This driver currently only handles memory-to-memory transfers.

TODO: Add support for all types of transfers.

Change-Id: Ic9787dcca919a58fb11b48c9f6b6b371db88c3ea
Origin: Original
Maintained-by: Zephyr
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-02-16 11:17:28 +00:00
Anas Nashif 15a6598691 Merge "Merge remote-tracking branch 'origin/core'" 2017-02-15 04:33:25 +00:00
Anas Nashif 643f3603f1 crypto: include tinycrypt only when enabled
Change-Id: Iea978586a529539255351fb05c7c76ca30baf8ce
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-15 02:07:16 +00:00
Anas Nashif 278f05770b ipm: fix Makefile to include drivers correctly
Change-Id: I606e7b4c5aebc5429e5e8288a5ed916569c7fa0a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-15 02:07:15 +00:00
Juan Manuel Cruz Alcaraz 485da78449 ataes132a: Adds a driver to support ATAES132A device
Adds a driver for Atmel Crypto Authorization solution
ATAES132A crypto device.

The driver supports the following functionality.

- AES CCM encryption, decryption and authentication
- AES ECB block operation.

The driver requires an I2C device to access crypto device registers.

Jira: ZEP-1387

Change-Id: I60aa8f3b069b703d4f83d866d28391625bb9ac13
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
2017-02-15 02:07:14 +00:00
Jithu Joseph de106b026a drivers/crypto: TinyCrypt shim driver
Shim layer interfacing between crypto APIs and TinyCrypt
library. Currently facilitates only a subset of TinyCrypt
features/algorithms.

Jira: ZEP-509

Change-Id: I7fe6b9d86df016d92d717378d08a1ab09caafb31
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
2017-02-15 01:08:15 +00:00
Iván Briano 867e61cbf3 drivers gpio: Fix disabling of interrupts for QMSI shims
When a GPIO pin is configured, the shim driver will first read the
current values in the controller registers to keep the other pins from
changing their configuration. After that it sets the bits for the
corresponding pin accordingly.

When the flag to enable interrupts is passed to the function, the
corresponding bits are all set properly, but no changes are made if
interrupts are not requested. This makes it impossible to disable
interrupts for a given pin once they've been enabled.

Fix it by always resetting the interrupt enabled bit when they have not
been requested. Other values can be left untouched as they won't have
any effect.

Jira: ZEP-1717

Change-Id: I30e97bb06d966291e23d0c66ddf39bce615c287b
Signed-off-by: Iván Briano <ivan.briano@intel.com>
2017-02-15 00:25:32 +00:00
Jorge Ramirez-Ortiz 28e60ef7ed flash/nrf5: fix invalid write access
Requesting a flash_write with a length of 0 results in a flash
position being written. Instead we should return 0 unless there is
some other input parameter that is invalid.

Change-Id: Ife6e6e2314bbee2bde7d0b69db3122ca00c361e0
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2017-02-15 00:08:33 +00:00
Paul Sokolovsky 5035f97686 eth/mcux: Add temporary workaround to unbreak IPv6 ND features.
This is a workaround for lack of driver API support for multicast
management. So, instead we want to receive all multicast frames
"by default", or otherwise basic IPv6 features, like address
resolution, don't work. On Kinetis Ethernet controller, that
translates to enabling promiscuous mode. The real fix depends
on ZEP-1673.

Change-Id: I98a27584be65bdc405de005383eb30bad2a7fcfc
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-02-14 08:30:35 +02:00
Marcus Shawcroft bbada2de50 eth/mcux: Add basic PHY support.
Add basic PHY management sufficient to detect link up, link down and
auto negotiated link speed / duplex.  The PHY driver is implemented as
a state machine that executed in the system work queue.  The
implementation is non blocking, using the MII interrupt to capture the
completion of read and write events.

This PHY management should be fairly generic. In the future, it may be
beneficial to pull this code out as a standalone PHY driver for use
with other ethernet drivers.

JIRA: ZEP-1674

Change-Id: I3dcb5c14982ef4b40591fcf10d84840b8a2558e5
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
2017-02-14 08:30:34 +02:00
Andrew Boie 42562b9367 xtensa: fix numerous checkpatch issues
Change-Id: I903f5f0692849fb9e7bf5d978b63b12bf1bd6e33
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 11:39:03 -08:00
Mazen NEIFER 4bff13e20a Xtensa port: Fixed Xtensa timer in case of tickles idle.
This driver was written for v1.5 before the introduction of the function
_sys_clock_final_tick_announce. At that time _sys_idle_elapsed_ticks was reset
to 0 automatically. Now that it is reset by the new function, the driver needed
to be fixed.

Change-Id: I039b4dbacb691aaf992b37e44404abd19a54a833
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 11:39:02 -08:00
Mazen NEIFER ff0828faf3 Xtensa port: Fixed compilation errors caused by last rebase on master.
Change-Id: If2896bcce26652ded2059a11620370e34f98d1e4
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 11:39:02 -08:00
Andrew Boie eab8a9f9ca xtensa_sim_console: remove deprecation warning
Change-Id: I10181f6c4d90e38927c1831c93fc459d33de6fd1
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER 8f92bc255c Xtensa port: Added support for Xtensa internal timer as system timer.
Change-Id: I1a0be1a377999f18ae47687edf4fc4950dcc5ba5
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER b0669a04b3 Xtensa port: Added support for Xtensa simulator console driver.
Change-Id: I58effa98fd6ff53bcfd21cb8de2fcd89651dc1d9
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER 0c736f2916 Xtensa port: Added Xtensa internal timer configuration need by assembly files.
This is needed by next commit as some assembly files handling interrupts use
some options from this file.
This file is not included in next commit to separate code and build system
aptches.

Change-Id: Iff3a8019362599beb0c0058c3169480fa5183c1c
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Anas Nashif 110df98619 Merge "Merge arm branch into master" 2017-02-11 04:00:58 +00:00
Jithu Joseph d625c2bb4c grove: fix variable type mismatch
These were reported by ISSM compiler.

Jira: ZEP-1179

Change-Id: I10d04c2949ad2a390d4c1159d2342c73108a58b7
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
2017-02-11 00:14:15 +00:00
Erwan Gouriou 8ab42c92ce clock_control: stm32: code optimization
This commit brings code size optimization as suggested by Christer
Weinigel review during review of initial commit for this driver.
It also cleans up useless definition in header file.

Change-Id: Ibeaa2e51570dff21825c60c30ba83d939b31d938
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 726d4dc437 drivers: stm32: clean up after stm23cube based clock control
After activation of cube based driver support on L4 and F3 series,
this commits performs the clean up of F3 and L4 relative code to
native clock control drivers.
Indirectly, it makes pwm driver supported de facto on F3 series

Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 3c389b54f0 clock control: clean up after stm32cube LL driver
After introduction and activation of STM32Cube LL based driver on
F3 and L4 series, this commit removes the no more needed code for
native driver for these soc.

Change-Id: I266d1a3fc4b464cee34b1cc1a1a333c5bf923e41
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 221087a72e flash: update stm32 flash_f3x to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update stm32f3xx flash driver to support it.
Clean up will be done afterwards.

Change-Id: I3260bb063f714fa29adbc71d8036f20479a99b34
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 2ab8250c5b pwm: update stm32 pwm to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update stm32 pwm driver to support it.
Once supported across the whole family, a clean up will be done.

Change-Id: I2ed38763b706e34ea1dceea50e97ce836dd9e195
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou bb2db5dbc5 i2c: update stm32 i2c_lx to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update stm32 i2c_lx driver to support it.
Clean up will be done in a following commit.

Change-Id: Ie5059bf4122d65fab1a663a5b00e0d761850a49d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 0a902c345c i2c: stm32: change deprecated constant
Use of SECONDARY in DEVICE_AND_API_INIT is now deprecated and should
be replaced by POST_KERNEL

Change-Id: I543ae70e493527e75b4a4bcb9191475065b49166
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 8c4f2a353f uart: update stm32 uart to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update stm32 serial driver to support it.
Once supported across the whole family, a clean up will be done.

Change-Id: I7100bc699e7918c8be71d58091da1860ab734e25
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 293b65f526 pinmux: update stm32 pinmux to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update pinmux driver to support it.
Once supported across the whole family, a clean up will be done.

Change-Id: Icc20816377f3a09f516a743462c92696a1fead3a
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 375b7171b4 gpio: update stm32 gpio to support LL clock control driver
After introducing STM32Cube based clock control driver for
stm32 family, update GPIO driver to support it.
Once supported across the whole family, we clean up will be done.

Change-Id: If50cb580cb01dc1d38557e54f19a8260feaa504e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Erwan Gouriou 58c8d15147 clock control:stm32: provide STM32Cube LL based driver
This new clock control driver aims at providing a lightweight
generic driver to the whole stm32 family.
Driver is based on LL Cube API and hence is for now available
only for STM32 supporting this API: stm32f3xx and stm32l4xx.
Other families should be supported soon.
Once globally supported, this unique driver will also help
reducing the impact of stm32 clock control heterogeneity in
other drivers.

Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-02-10 14:47:41 -06:00
Bogdan Davidoaia 5b02ba8319 kw41z: add base DTS support
This patch adds the base DTS support for the KW41Z Freedom board. The
initial set of changes include SRAM, FLASH, IRQ controller and LPUART
support.

Change-Id: Ic68c4959ddad0c5cfe70d5576a0e58372b93ec9d
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
2017-02-10 18:14:05 +00:00
Vincenzo Frascino 0da2a03234 v2m_beetle: uart: Add DTS support to UART driver
This patch adds DTS support to the ARM CMSDK UART driver.  The DTS
currently specifies the IRQ, IRQ PRIO, and base address of the port.

Change-Id: I8e5bc81c013958be4297d563495bf126b53a83a9
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 18:14:04 +00:00
Andy Gross 670aa0cc99 stm32: uart: Add DTS support to STM32 UART driver
This patch adds device tree support to the STM32 UART driver.  The base
address, interrupt, and interrupt priority values can now come from DTS.

Change-Id: I3c383da8b200037601ecb2dc087f99ef103761bb
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 18:14:02 +00:00
Gil Pitney b465fbe312 cc3200: Enable device tree usage for CC3200
This patch ifdef's out information that would be redefined by
information generated from DTS.  This patch also fixes up the serial
drives to work properly with the DTS generated information.

Change-Id: I912ccf35be23c107705a4866e5a68b3b51154ffa
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 18:14:01 +00:00
Andy Gross ddce7dea40 dts: arm: Kinetis: Add base support for Kinetis
This patch adds DTS support and related files for the NXP Kinetis
platform.  The DTS files contain the base definitions for the hardware
nodes on Kinetis platforms.  The YAML files provide the definitions of
the contents of the DTS nodes.

The Kconfig changes were put in place to allow for the conversion of
existing drivers.  Once those drivers are modified, the Kconfig options
that are replaced by the DTS information will be removed.

Change-Id: If110fffa99c0b12471cf2df206da6687277e4756
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-02-10 18:13:59 +00:00
Anas Nashif 8c7aa9aa85 Merge "Merge bluetooth branch into master" 2017-02-10 16:37:56 +00:00
Juan Solano ee623d21de drivers: Remove unnecessary CONFIG_SYS_POWER_DEEP_SLEEP
This commit removes unnecessary CONFIG_SYS_POWER_DEEP_SLEEP protection
in shim drivers as QMSI 1.4 has introduced empty context save/restore
functions that can be called in Quark D2000, therefore keeping common
code at the shim driver level for Quark SE and D2000.

Change-Id: Ia2a466327f999668c6511c0193014e9151bff6ae
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
2017-02-10 16:27:32 +00:00
Luiz Augusto von Dentz 2e444cb34c drivers: Convert FOR_EACH macro instances to use CONTAINER
Change-Id: Ifc08d39fe84f522e071d3b9e32479798bbd89c6c
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-02-10 16:16:16 +00:00
Johan Hedberg 01c821f56f Merge bluetooth branch into master
Some more Bluetooth fixes for 1.7.0-rc1.

----------------------------------------------------------------
Arun Jagadish (1):
      Bluetooth: AVDTP: Moving structures to headerfile

Johan Hedberg (1):
      Bluetooth: Fix missing connection cleanup in some scenarios

Luiz Augusto von Dentz (1):
      Bluetooth: GATT: Fix not updating previous node

Prasanna Karthik (1):
      Bluetooth: nble: Catch and handle non-zero fn_index

Szymon Janc (1):
      Bluetooth: Fix not clearing signaled flag for conn_change signal

 drivers/bluetooth/nble/rpc_deserialize.c |  3 +-
 subsys/bluetooth/host/avdtp.c            | 10 ----
 subsys/bluetooth/host/avdtp_internal.h   | 13 +++++
 subsys/bluetooth/host/conn.c             | 49 +++++++++++------
 subsys/bluetooth/host/conn_internal.h    |  1 +
 subsys/bluetooth/host/gatt.c             |  1 +
 6 files changed, 48 insertions(+), 29 deletions(-)

Change-Id: If1d53d9767d89080480ce5147156adeeb26565dc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-02-10 18:03:51 +02:00
Anas Nashif df16cb92d4 arduino_101: bmi160: use new device name
Use new device name for SPI device

Jira: ZEP-1704
Change-Id: Iec39468bbef54423af2b3a681dd4ae1eee866d1e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-10 16:02:22 +00:00
Prasanna Karthik 6545aa3f52 Bluetooth: nble: Catch and handle non-zero fn_index
Avoid multiple breaks and gracefully catch non-zero values of fn_index

Change-Id: I1cf7b271b8478e63af2da1f40b4caceb63d7ce90
Signed-off-by: Prasanna Karthik <pkarthik@intrinsyc.com>
2017-02-10 12:03:09 +00:00
Baohong Liu 15b44146cd drivers: dma_shim: update dma qmsi shim driver
Update the qmsi dma shim driver based on the new dma api
interface.

Recently, a RFC was posted to update the dma api. The update
to dma api interface was already posted. This change is to
update the dma qmsi shim driver based on the dma api change.
It is using the new data structures and new api function names.

Jira: ZEP-873

Change-Id: If9a772c5ff1c2b10fca05172c48f75223bbf940e
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
2017-02-10 02:18:16 +00:00
Jean-Paul Etienne 5d5265bca4 riscv32: timer: disable riscv_machine_timer driver by default for riscv32
Enabling the riscv_machine_timer driver by default for riscv32
causes compilation issues on riscv32 boards (like zedboard_pulpino)
not supporting it.

Boards supporting the driver enable it via their respective
config file.

Change-Id: Ieb0d25fa339834fd386ae2725f40b6b7b72dc52b
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-02-09 00:26:26 +01:00
Kuo-Lang Tseng 0e91e84122 drivers: QMSI PWM: simplify driver reentrancy code using IS_ENABLED macro
This is one the series patches that simplifies the driver code by
using the IS_ENABLED macro. This removes the need of the const
variable and the wrapper functions on semaphore APIs.

Jira: ZEP-1251

Change-Id: Ic2df5d04966d2a066478ca3e119f76d24fc4dfb3
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
2017-02-08 19:08:31 +00:00
Kuo-Lang Tseng 8bf14d380b drivers: QMSI RTC: simplify driver reentrancy code using IS_ENABLED
This is one of the series of patches that simplifies the driver
code by using the IS_ENABLED macro. This removes the need of the
const variable and the wrapper functions on semaphore APIs.

Jira: ZEP-1251

Change-Id: I84a09a0aaa3a00452d8c2b4bca7be0f6b2015218
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
2017-02-08 19:08:06 +00:00
Kuo-Lang Tseng 74f7da1bb4 drivers: QMSI SOC flash: simplify driver reentrancy code using IS_ENABLED
This is one the series patches that simplifies the driver code by
using the IS_ENABLED macro. This removes the need of the const
variable and the wrapper functions on semaphore APIs.

Jira: ZEP-1251

Change-Id: I59802cf9f482337656b0fdc4b272f3b1ddc6cbda
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
2017-02-08 19:07:42 +00:00