Add missing UARTs from the main device tree. They are declared as
disabled and can be enabled individually by each board.
Change-Id: I0ec73c59b4c3c4ee56f12ae70f2d6cdbec14fe33
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add necessary Kconfig and minimal device tree in order to support
STM32F413xH variants as found on the Nucleo STM32F413 board.
Origin: Original
Change-Id: I60230c240d6acb610f16a02c62048d448476e9c5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Rename SOC_STM32F407XX to SOC_STM32F407XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file).
Change-Id: I0afa16e86b7c99b9e685004f96beeb888f9e7568
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename SOC_STM32F429XX to SOC_STM32F429XI to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: Id188b7703d2bce0a3ded09132ff0f205efa9c143
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)
Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The xC tag in the SoC reference indicates the flash size, use it in the
configuration to permit selection of correct flash size for dts.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This patch enables the generation of the ARM CMSDK UART base address
from the device tree.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This adds support for the nRF51 chip on the board.
If you'd like to run Zephyr on the STM32F4 chip on Carbon, you need to
use the 96b_carbon board instead.
The current SPI Bluetooth protocol only uses 5 wires, so we use the
remaining pin as UART TX.
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Add configuration, dts and documentation for the Nucleo L432KC board
based on the STM32L432KC SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Converted Stellaris UART driver over to utilize device tree generated
defines. Added a yaml description for the uart, and converted over the
ti_lm3s6965 SoC & qemu_cortex_m3 board port over to utilize it.
Change-Id: Ie20844eb63d2c68eb59ad4160f7f5b5a35e2943b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a simple device tree for the TI lm3s6965 SoC and QEMU
Cortex-M3 board port. We get flash and memory base addresses and sizes
from the device tree as well as the ARM NVIC number of priority bits.
Change-Id: I4452b5543de7be55518997e54837ccbfd4f121df
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF51822 SoCs and Arduino 101-BLE,
Curie-BLE, BLE Nano, PCA10028-DK, and Quark-SE BLE boards. This
is minimal support for memory, flash, and UART.
Change-Id: I7e572bea537e384b6d66e520462f023ace0c9b35
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for nRF52840 SoC and PCA10056-DK board. This
is minimal support for memory, flash, and UART.
For the nRF52840 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: I1c377e0cb97ff4716ea5489fffaa7c0e2b34d18a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add device tree support for Nitrogen 96board, BLE Nano 2, and
nRF52-PCA10040 DK boards. This is minimal support for memory, flash,
and UART.
For the nRF52832 we select between "nordic,nrf-uarte", "nordic,nrf-uart"
support for each board.
Change-Id: Ia247b9b710a72416e9ab0de3ca1429bfab8917f8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to allow the use of such board, a very preliminar port was
developed. It consists of board files, as well as pinmux, uart, gpio,
spi drivers and device tree files.
Change-Id: I5753064e39e0b023cf4481744c176de26d8dbebb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The CC3200 doesn't have on chip flash, so we should be including it in
the dts.
Change-Id: I8d4bbe2b09ed1aa563efe4c979da1f4729b93534
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds a shim layer around the mcux lpsci driver to adapt it to the Zephyr
serial interface.
Change-Id: I024f1605e3194f34bb57e8a121900e05b3085a82
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for STM32L475xG SoC as a preliminary for
Discovery IOT board support.
stm32l476.dtsi file is now including stm32l475.dtsi
since STM32L476 SoC is a STM32L475 SoC with LCD support
Change-Id: I7567255e4172231cbf4899474617ecae0cd68d64
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This to align with previous patch:
"dts: Align uart "baud-rate" property to device tree spec "current-speed""
Jira: ZEP-1958
Change-Id: I65328cf63e25b0378f270b5f60deb9d6a1f49b8c
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
CC3220SF_LAUNCHXL effectively replaces the CC3200_LAUNCHXL,
with support for the CC3220SF SoC, which is an update for
the CC3200 SoC.
This is supported by the Texas Instruments CC3220 SDK.
Jira: ZEP-1958
Change-Id: I2484d3ee87b7f909c783597d95128f2b45db36f2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Devicetree.org specifies that serial devices property used to set
baud rate is "current-speed", while zephyr uses "baud-rate".
Align property name in order to keep zephyr dts files compatible
with device tree specification and could be re-used from/to
Linux for instance. We also cleanup a few SoCs that set "baud-rate" in
the SoC dts and not the board.
Jira: ZEP-2048
Change-Id: I097e7439ee46fe77c628b56531772950382fafcc
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This in preparation for adding a cc3220sf DTS file, which
has a different address for sram0 than the cc3200.
Also moved baud-rate out of soc dtsi file to board dts.
Jira: JEP-1958
Change-Id: I641452c0a8a6d1ad4424e132d6ef2de71d8545b4
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Add plumbing to build system and SoC level dtsi for the NRF52832 SoC.
We additionally add the necessary yaml files for the UART on the NRF52
SoCs.
Change-Id: I3b4a821b2993827e33d8e84bdbbc759d1521f8bd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds initial support and documentation for the kw40z on the hexiwear
board.
Jira: ZEP-1391
Change-Id: Idb58bfb3c2951b1f737a8c547860bde4ef4d9a3e
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds initial support for the kw40z SoC. This SoC has all the same
peripherals as the kw41z but with less flash and ram, so the defconfig
and dts are nearly the same.
Jira: ZEP-1388
Change-Id: Ib804451e8c2c71c4ff7d342bf23f6567d1542a2d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converted over all STM32F3 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F3.
Boards that are now using devicetree:
* Nucleo f334r8
* STM32373C Eval
Change-Id: I081a1d83f86e417a98b6864c745354b6b32953b7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F1 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F1. Also
renamed the STM32F10{3,7} SoC dtsi to try and make it clear that the 'X'
is a place holder. Fixedup the top level compatiables in the boards to
be the specific 'X' instead of the generic one.
Boards that are now using devicetree:
* Nucleo f103rb
* STM3210C Eval
* STM32 MINI A15
Change-Id: I29b3634ec7451f974687d55980414efa655e2e96
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Converted over all STM32F4 based boards to use device tree and removed
associated bits that now come from the device tree for STM32F4.
Boards that are now using devicetree:
* 96b_carbon
* nucleo f401re
* nucleo f411re
Change-Id: Ibe197ca0a3f5ad78d594485a578d986403cc824a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Updated st/mem.h to support the following SoCs:
CONFIG_SOC_STM32F303XC
CONFIG_SOC_STM32F407XX
CONFIG_SOC_STM32F429XX
Change-Id: I1654c1fd8dc0d1eb471c092777a8fd262465dc51
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a __SIZE_K macro to make things a bit more human readable.
Also fixed up sizes for CONFIG_SOC_STM32F411XE.
Change-Id: I01b8b5f627ad949c2af01ee966428bfabe09e2ee
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commits provides dts files for non ST, STM32 based boards.
Change-Id: Ib324ba418fb27ddbce45a60fbe8e73c7b6896aa4
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit provides dts file for nucleo boards.
For now dtsi files only populates uart nodes so other nodes
are not taken into account into board dts files.
Change-Id: Ide95a8ba3671b91ff0311b7671e77b3bf96db297
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit provides dtsi files for available stm32 base boards.
For now only uart nodes and IRQ number are provided in order to
enable delivery of coherent material.
It also clears additional content from stm32f103xb.dtsi
Change-Id: I62d932c7f22b56e95bcd9566ce39e14a393dd640
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
As there can be a large number of FLASH & SRAM sizes for the same SoC
having a dts/dtsi for each one would be extremely painful. Lets just
use some #defines to set that FLASH & SRAM sizes based on the SoC that
is being built.
Change-Id: I06388ada4e49ed3d576da31150288512bb6b4485
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch modifies the DTS file to make the inclusion of the
bluetooth UART port conditional on CONFIG_BLUETOOTH option.
Issue: ZEP-1745
Change-Id: Iea8dc60fe17d131d8e3765e1962b25d157065c67
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In general we should be using hardcoded addresses in the dtsi files
rather than getting ifdef from other places. As the unit address of the
node is typically based on the address in hex w/o the '0x' we can't just
use #defines directly.
Change-Id: I0e17e001151728d16842806d9407e66e6e5129cf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the SoC dtsi into a vendor dir so as we grow and possibly share
things with other projects we are hopefully in sync (or closer to it).
Change-Id: I71666cff49f9694eee3f5d92dac8aeea416b730a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Florian Vaussard